From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752156AbdEQL2O (ORCPT ); Wed, 17 May 2017 07:28:14 -0400 Received: from smtp5-g21.free.fr ([212.27.42.5]:55396 "EHLO smtp5-g21.free.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751300AbdEQL2M (ORCPT ); Wed, 17 May 2017 07:28:12 -0400 Subject: Re: [PATCH] nand_base: optimize checking of erased buffers To: Pavel Machek , Boris Brezillon Cc: Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Cyrille Pitchen , linux-mtd , LKML , mark.marshall@omicronenergy.com, b44839@freescale.com, prabhakar@freescale.com References: <20170419121332.GA26979@amd> <20170419231804.5a04ed69@bbrezillon> <20170419221507.GA24914@amd> <20170420002748.5c76c9b9@bbrezillon> <20170420114057.GA4705@amd> <20170421105107.GA7259@amd> From: Mason Message-ID: <421c46b9-288f-42e9-5b2f-d93af1e8a418@free.fr> Date: Wed, 17 May 2017 13:27:43 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Firefox/52.0 SeaMonkey/2.49 MIME-Version: 1.0 In-Reply-To: <20170421105107.GA7259@amd> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/04/2017 12:51, Pavel Machek wrote: > If we see ~0UL in flash, there's no need for hweight, and no need to > check number of bitflips. So this should be net win. > > Signed-off-by: Pavel Machek > > diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c > index b0524f8..96c27ec 100644 > --- a/drivers/mtd/nand/nand_base.c > +++ b/drivers/mtd/nand/nand_base.c > @@ -1357,7 +1357,10 @@ static int nand_check_erased_buf(void *buf, int len, int bitflips_threshold) > > for (; len >= sizeof(long); > len -= sizeof(long), bitmap += sizeof(long)) { > - weight = hweight_long(*((unsigned long *)bitmap)); I hadn't noticed this earlier. There is, obviously, an implicit requirement that 'buf' must be 4-byte aligned on 32-bit platforms, and 8-byte aligned on 64-bit platforms. This is not true for my platform, as the ecc pointer is chip->oob_poi + 10 I suppose it's not a problem if the platform can handle unaligned loads, otherwise it spells trouble. > + unsigned long d = *((unsigned long *)bitmap); > + if (d == ~0UL) > + continue; > + weight = hweight_long(d); > bitflips += BITS_PER_LONG - weight; > if (unlikely(bitflips > bitflips_threshold)) > return -EBADMSG; > The optimization makes sense in itself, but given that it's on an error path (?) I'm not sure it will bring any tangible benefits? Regards.