From: <Claudiu.Beznea@microchip.com>
To: <Hari.PrasathGE@microchip.com>, <Nicolas.Ferre@microchip.com>,
<davem@davemloft.net>, <krzysztof.kozlowski+dt@linaro.org>,
<alexandre.belloni@bootlin.com>, <arnd@arndb.de>,
<olof@lixom.net>, <soc@kernel.org>, <Manikandan.M@microchip.com>,
<michael@walle.cc>, <Horatiu.Vultur@microchip.com>,
<Kavyasree.Kotagiri@microchip.com>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <Durai.ManickamKR@microchip.com>
Subject: Re: [linux][PATCH 5/6] ARM: dts: at91: sam9x60: Add missing flexcom definitions
Date: Thu, 8 Sep 2022 07:58:36 +0000 [thread overview]
Message-ID: <4283376f-a406-0058-3e8a-ad0c7cdbec68@microchip.com> (raw)
In-Reply-To: <20220907092054.29915-6-Hari.PrasathGE@microchip.com>
On 07.09.2022 12:20, Hari Prasath wrote:
> From: Durai Manickam KR <durai.manickamkr@microchip.com>
>
> Added the missing flexcom functions for all the flexcom nodes.
Did you got the chance to test all these?
>
> Signed-off-by: Manikandan M <manikandan.m@microchip.com>
> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
> Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
> ---
> arch/arm/boot/dts/sam9x60.dtsi | 547 +++++++++++++++++++++++++++++++++
> 1 file changed, 547 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
> index feeabc53e0ec..1c580c3ba7c3 100644
> --- a/arch/arm/boot/dts/sam9x60.dtsi
> +++ b/arch/arm/boot/dts/sam9x60.dtsi
> @@ -170,6 +170,27 @@
> ranges = <0x0 0xf0000000 0x800>;
> status = "disabled";
>
> + uart4: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(8))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(9))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> spi4: spi@400 {
> compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
> reg = <0x400 0x200>;
> @@ -188,6 +209,24 @@
> atmel,fifo-size = <16>;
> status = "disabled";
> };
> +
> + i2c4: i2c@600 {
> + compatible = "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(8))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(9))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> };
>
> flx5: flexcom@f0004000 {
> @@ -219,6 +258,43 @@
> atmel,fifo-size = <16>;
> status = "disabled";
> };
> +
> + spi5: spi@400 {
> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
> + clock-names = "spi_clk";
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(10))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(11))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + i2c5: i2c@600 {
> + compatible = "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(10))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(11))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> };
>
> dma0: dma-controller@f0008000 {
> @@ -290,6 +366,45 @@
> #size-cells = <1>;
> ranges = <0x0 0xf0020000 0x800>;
> status = "disabled";
> +
> + uart11: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(22))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(23))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + i2c11: i2c@600 {
> + compatible = "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(22))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(23))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> };
>
> flx12: flexcom@f0024000 {
> @@ -300,6 +415,45 @@
> #size-cells = <1>;
> ranges = <0x0 0xf0024000 0x800>;
> status = "disabled";
> +
> + uart12: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(24))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(25))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + i2c12: i2c@600 {
> + compatible = "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(24))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(25))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> };
>
> pit64b: timer@f0028000 {
> @@ -419,6 +573,27 @@
> ranges = <0x0 0xf8010000 0x800>;
> status = "disabled";
>
> + uart6: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(12))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(13))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> i2c6: i2c@600 {
> compatible = "microchip,sam9x60-i2c";
> reg = <0x600 0x200>;
> @@ -446,6 +621,45 @@
> #size-cells = <1>;
> ranges = <0x0 0xf8014000 0x800>;
> status = "disabled";
> +
> + uart7: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(14))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(15))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + i2c7: i2c@600 {
> + compatible = "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(14))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(15))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> };
>
> flx8: flexcom@f8018000 {
> @@ -456,15 +670,96 @@
> #size-cells = <1>;
> ranges = <0x0 0xf8018000 0x800>;
> status = "disabled";
> +
> + uart8: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(16))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(17))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + i2c8: i2c@600 {
> + compatible = "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(16))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(17))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> };
>
> flx0: flexcom@f801c000 {
> compatible = "atmel,sama5d2-flexcom";
> reg = <0xf801c000 0x200>;
> clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> ranges = <0x0 0xf801c000 0x800>;
> status = "disabled";
>
> + uart0: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(0))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(1))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + spi0: spi@400 {
> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
> + clock-names = "spi_clk";
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(0))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(1))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> i2c0: i2c@600 {
> compatible = "microchip,sam9x60-i2c";
> reg = <0x600 0x200>;
> @@ -494,6 +789,64 @@
> #size-cells = <1>;
> ranges = <0x0 0xf8020000 0x800>;
> status = "disabled";
> +
> + uart1: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(2))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(3))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + spi1: spi@400 {
> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
> + clock-names = "spi_clk";
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(2))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(3))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + i2c1: i2c@600 {
> + compatible = "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(2))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(3))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> };
>
> flx2: flexcom@f8024000 {
> @@ -504,6 +857,64 @@
> #size-cells = <1>;
> ranges = <0x0 0xf8024000 0x800>;
> status = "disabled";
> +
> + uart2: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(4))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(5))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + spi2: spi@400 {
> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
> + clock-names = "spi_clk";
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(4))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(5))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + i2c2: i2c@600 {
> + compatible = "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(4))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(5))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> };
>
> flx3: flexcom@f8028000 {
> @@ -514,6 +925,64 @@
> #size-cells = <1>;
> ranges = <0x0 0xf8028000 0x800>;
> status = "disabled";
> +
> + uart3: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(6))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(7))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + spi3: spi@400 {
> + compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
> + reg = <0x400 0x200>;
> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
> + clock-names = "spi_clk";
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(6))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(7))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + i2c3: i2c@600 {
> + compatible = "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(6))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(7))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> };
>
> macb0: ethernet@f802c000 {
> @@ -579,6 +1048,45 @@
> #size-cells = <1>;
> ranges = <0x0 0xf8040000 0x800>;
> status = "disabled";
> +
> + uart9: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(18))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(19))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + i2c9: i2c@600 {
> + compatible = "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(18))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(19))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> };
>
> flx10: flexcom@f8044000 {
> @@ -589,6 +1097,45 @@
> #size-cells = <1>;
> ranges = <0x0 0xf8044000 0x800>;
> status = "disabled";
> +
> + uart10: serial@200 {
> + compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
> + reg = <0x200 0x200>;
> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(20))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(21))>;
> + dma-names = "tx", "rx";
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
> + clock-names = "usart";
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> +
> + i2c10: i2c@600 {
> + compatible = "microchip,sam9x60-i2c";
> + reg = <0x600 0x200>;
> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
> + dmas = <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(20))>,
> + <&dma0
> + (AT91_XDMAC_DT_MEM_IF(0) |
> + AT91_XDMAC_DT_PER_IF(1) |
> + AT91_XDMAC_DT_PERID(21))>;
> + dma-names = "tx", "rx";
> + atmel,fifo-size = <16>;
> + status = "disabled";
> + };
> };
>
> isi: isi@f8048000 {
next prev parent reply other threads:[~2022-09-08 7:58 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-07 9:20 [linux][PATCH 0/6] Add support for sam9x60 curiosity board Hari Prasath
2022-09-07 9:20 ` [linux][PATCH 1/6] ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom functions Hari Prasath
2022-09-07 9:20 ` [linux][PATCH 2/6] ARM: dts: at91: sam9x60: Move flexcom definitions to the SoC dtsi Hari Prasath
2022-09-08 7:59 ` Claudiu.Beznea
2022-09-07 9:20 ` [linux][PATCH 3/6] ARM: dts: at91: sam9x60: Specify the FIFO size for the Flexcom UART Hari Prasath
2022-09-07 9:20 ` [linux][PATCH 4/6] ARM: dts: at91: sam9x60: Add DMA bindigs for the flexcom nodes Hari Prasath
2022-09-08 7:58 ` Claudiu.Beznea
2022-09-07 9:20 ` [linux][PATCH 5/6] ARM: dts: at91: sam9x60: Add missing flexcom definitions Hari Prasath
2022-09-08 7:58 ` Claudiu.Beznea [this message]
2022-09-07 9:20 ` [linux][PATCH 6/6] ARM: dts: at91: sam9x60_curiosity: Add device tree for sam9x60_curiosity board Hari Prasath
2022-09-08 7:58 ` Claudiu.Beznea
2022-09-08 11:04 ` Krzysztof Kozlowski
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