From: "Michel Dänzer" <michel.daenzer@mailbox.org>
To: Chia-I Wu <olvaffe@gmail.com>, Matthew Brost <matthew.brost@intel.com>
Cc: "Boris Brezillon" <boris.brezillon@collabora.com>,
"ML dri-devel" <dri-devel@lists.freedesktop.org>,
intel-xe@lists.freedesktop.org,
"Steven Price" <steven.price@arm.com>,
"Liviu Dudau" <liviu.dudau@arm.com>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Danilo Krummrich" <dakr@kernel.org>,
"Philipp Stanner" <phasta@kernel.org>,
"Christian König" <ckoenig.leichtzumerken@gmail.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"open list" <linux-kernel@vger.kernel.org>,
tj@kernel.org
Subject: Re: drm_sched run_job and scheduling latency
Date: Fri, 6 Mar 2026 10:40:05 +0100 [thread overview]
Message-ID: <4289aeea-0446-4bc5-a18d-d5049bc1dabd@mailbox.org> (raw)
In-Reply-To: <28ce8bae-bc49-4f51-9f12-ae7bc427c920@mailbox.org>
On 3/6/26 10:36, Michel Dänzer wrote:
> On 3/6/26 06:13, Chia-I Wu wrote:
>> On Thu, Mar 5, 2026 at 12:52 PM Matthew Brost <matthew.brost@intel.com> wrote:
>>> On Thu, Mar 05, 2026 at 11:52:01AM +0100, Boris Brezillon wrote:
>>>> On Thu, 5 Mar 2026 02:09:16 -0800
>>>> Matthew Brost <matthew.brost@intel.com> wrote:
>>>>> On Thu, Mar 05, 2026 at 09:27:11AM +0100, Boris Brezillon wrote:
>>>>>> On Wed, 4 Mar 2026 18:04:25 -0800
>>>>>> Matthew Brost <matthew.brost@intel.com> wrote:
>>>>>>> On Wed, Mar 04, 2026 at 02:51:39PM -0800, Chia-I Wu wrote:
>>>>>>>>
>>>>>>>> Thoughts? Or perhaps this becomes less of an issue if all drm_sched
>>>>>>>> users have concrete plans for userspace submissions..
>>>>>>>
>>>>>>> Maybe some day....
>>>>>>
>>>>>> I've yet to see a solution where no dma_fence-based signalization is
>>>>>> involved in graphics workloads though (IIRC, Arm's solution still
>>>>>> needs the kernel for that). Until that happens, we'll still need the
>>>>>> kernel to signal fences asynchronously when the job is done, which I
>>>>>> suspect will cause the same kind of latency issue...
>>>>>>
>>>>>
>>>>> I don't think that is the problem here. Doesn’t the job that draws the
>>>>> frame actually draw it, or does the display wait on the draw job’s fence
>>>>> to signal and then do something else?
>>>>
>>>> I know close to nothing about SurfaceFlinger and very little about
>>>> compositors in general, so I'll let Chia answer that one. What's sure
>>>
>>> I think Chia input would good, as if SurfaceFlinger jobs have input
>>> dependencies this entire suggestion doesn't make any sense.
>>>
>>>> is that, on regular page-flips (don't remember what async page-flips
>>>> do), the display drivers wait on the fences attached to the buffer to
>>>> signal before doing the flip.
>>>
>>> I think SurfaceFlinger is different compared to Wayland/X11 use cases,
>>> as maintaining a steady framerate is the priority above everything else
>>> (think phone screens, which never freeze, whereas desktops do all the
>>> time). So I believe SurfaceFlinger decides when it will submit the job
>>> to draw a frame, without directly passing in application dependencies
>>> into the buffer/job being drawn. Again, my understanding here may be
>>> incorrect...
>> That is correct. SurfaceFlinger only ever latches buffers whose
>> associated fences have signaled, and sends down the buffers to gpu for
>> composition or to the display for direct scanout. That might also be
>> how modern wayland compositors work nowadays?
>
> Many (most of the major ones?) do, yes. (Weston being a notable exception AFAIK, though since it supports the Wayland syncobj protocol now, switching to this model shoul
Err, I meant the commit-timing protocol, Weston doesn't support the syncobj protocol yet AFAICT.
--
Earthling Michel Dänzer \ GNOME / Xwayland / Mesa developer
https://redhat.com \ Libre software enthusiast
next prev parent reply other threads:[~2026-03-06 9:45 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-04 22:51 Chia-I Wu
2026-03-05 2:04 ` Matthew Brost
2026-03-05 8:27 ` Boris Brezillon
2026-03-05 8:38 ` Philipp Stanner
2026-03-05 9:10 ` Matthew Brost
2026-03-05 9:47 ` Philipp Stanner
2026-03-16 4:05 ` Matthew Brost
2026-03-16 4:14 ` Matthew Brost
2026-03-05 10:19 ` Boris Brezillon
2026-03-05 12:27 ` Danilo Krummrich
2026-03-05 10:09 ` Matthew Brost
2026-03-05 10:52 ` Boris Brezillon
2026-03-05 20:51 ` Matthew Brost
2026-03-06 5:13 ` Chia-I Wu
2026-03-06 7:21 ` Matthew Brost
2026-03-06 9:36 ` Michel Dänzer
2026-03-06 9:40 ` Michel Dänzer [this message]
2026-03-05 8:35 ` Tvrtko Ursulin
2026-03-05 9:40 ` Boris Brezillon
2026-03-27 9:19 ` Tvrtko Ursulin
2026-03-05 9:23 ` Boris Brezillon
2026-03-06 5:33 ` Chia-I Wu
2026-03-06 7:36 ` Matthew Brost
2026-03-05 23:09 ` Hillf Danton
2026-03-06 5:46 ` Chia-I Wu
2026-03-06 11:58 ` Hillf Danton
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