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From: "Arnd Bergmann" <arnd@arndb.de>
To: "Manikanta Guntupalli" <manikanta.guntupalli@amd.com>,
	git@amd.com, "Michal Simek" <michal.simek@amd.com>,
	"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
	"Frank Li" <Frank.Li@nxp.com>, "Rob Herring" <robh@kernel.org>,
	krzk+dt@kernel.org, "Conor Dooley" <conor+dt@kernel.org>,
	"Przemysław Gaj" <pgaj@cadence.com>,
	"Wolfram Sang" <wsa+renesas@sang-engineering.com>,
	tommaso.merciai.xr@bp.renesas.com, quic_msavaliy@quicinc.com,
	Shyam-sundar.S-k@amd.com,
	"Sakari Ailus" <sakari.ailus@linux.intel.com>,
	"'billy_tsai@aspeedtech.com'" <billy_tsai@aspeedtech.com>,
	"Kees Cook" <kees@kernel.org>,
	"Gustavo A. R. Silva" <gustavoars@kernel.org>,
	"Jarkko Nikula" <jarkko.nikula@linux.intel.com>,
	"Jorge Marques" <jorge.marques@analog.com>,
	"linux-i3c@lists.infradead.org" <linux-i3c@lists.infradead.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Linux-Arch <linux-arch@vger.kernel.org>,
	linux-hardening@vger.kernel.org
Cc: radhey.shyam.pandey@amd.com, srinivas.goud@amd.com,
	shubhrajyoti.datta@amd.com, manion05gk@gmail.com
Subject: Re: [PATCH V8 2/5] asm-generic/io.h: Add big-endian MMIO accessors
Date: Fri, 26 Sep 2025 13:03:21 +0200	[thread overview]
Message-ID: <42afd2b3-ea3d-4413-b32b-b3f1ef651fba@app.fastmail.com> (raw)
In-Reply-To: <20250926105349.2932952-3-manikanta.guntupalli@amd.com>

On Fri, Sep 26, 2025, at 12:53, Manikanta Guntupalli wrote:
> Add MMIO accessors to support big-endian memory operations. These helpers
> include {read, write}{w, l, q}_be() and {read, write}s{w, l, q}_be(),
> which allows to access big-endian memory regions while returning
> the results in the CPU’s native endianness.
>
> This provides a consistent interface to interact with hardware using
> big-endian register layouts.
>
> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>

My general feeling to this patch has not changed: I don't think
these should be added in asm-generic/io.h at all, for multiple
reasons

- the {read,write}{w,l,q}be() helpers are redundant
  as they do the same as io{read,write}{16,32,64}be() for
  all practical purposes
- Adding them caused build failures on some of the
  architectures that already have the same interfaces
- You are not actually using any of them in your patch
- The two functions that you do use, {read,write}sl()
  do not do what they claim to do and are impossible
  to use in portable code because they only work on
  byte-swapped FIFO registers when using a little-endian
  kernel.

Please just fold whatever code you end up needing into
your own driver as you had it in earlier versions.

     Arnd

  reply	other threads:[~2025-09-26 11:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-26 10:53 [PATCH V8 0/5] Add AMD I3C master controller driver and bindings Manikanta Guntupalli
2025-09-26 10:53 ` [PATCH V8 1/5] dt-bindings: i3c: Add AMD I3C master controller support Manikanta Guntupalli
2025-09-26 10:53 ` [PATCH V8 2/5] asm-generic/io.h: Add big-endian MMIO accessors Manikanta Guntupalli
2025-09-26 11:03   ` Arnd Bergmann [this message]
2025-09-27  6:12   ` kernel test robot
2025-09-26 10:53 ` [PATCH V8 3/5] i3c: fix big-endian FIFO transfers Manikanta Guntupalli
2025-09-26 10:53 ` [PATCH V8 4/5] i3c: master: Add endianness support for i3c_readl_fifo() and i3c_writel_fifo() Manikanta Guntupalli
2025-09-26 11:09   ` Arnd Bergmann
2025-09-26 14:51     ` Frank Li
2025-09-26 10:53 ` [PATCH V8 5/5] i3c: master: Add AMD I3C bus controller driver Manikanta Guntupalli

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