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It also addresses >> Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1734 >> >> v2: >>   * keep the 8-bit value for global_alpha_value (Nicholas) >>   * correct the logical ordering for combined global gain (Nicholas) >>   * apply to dcn10 too (Nicholas) >> >> Signed-off-by: Melissa Wen >> --- >>   .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  | 14 +++++++++----- >>   drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 14 +++++++++----- >>   2 files changed, 18 insertions(+), 10 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c >> index ad757b59e00e..b1034e6258c8 100644 >> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c >> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c >> @@ -2528,14 +2528,18 @@ void dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx) >>       struct mpc *mpc = dc->res_pool->mpc; >>       struct mpc_tree *mpc_tree_params = &(pipe_ctx->stream_res.opp->mpc_tree_params); >>   -    if (per_pixel_alpha) >> -        blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; >> -    else >> -        blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; >> - >>       blnd_cfg.overlap_only = false; >>       blnd_cfg.global_gain = 0xff; >>   +    if (per_pixel_alpha && pipe_ctx->plane_state->global_alpha) { >> +        blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; >> +        blnd_cfg.global_gain = pipe_ctx->plane_state->global_alpha_value; >> +    } else if (per_pixel_alpha) { >> +        blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; >> +    } else { >> +        blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; >> +    } >> + >>       if (pipe_ctx->plane_state->global_alpha) >>           blnd_cfg.global_alpha = pipe_ctx->plane_state->global_alpha_value; >>       else >> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c >> index 4290eaf11a04..b627c41713cc 100644 >> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c >> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c >> @@ -2344,14 +2344,18 @@ void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx) >>       struct mpc *mpc = dc->res_pool->mpc; >>       struct mpc_tree *mpc_tree_params = &(pipe_ctx->stream_res.opp->mpc_tree_params); >>   -    if (per_pixel_alpha) >> -        blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; >> -    else >> -        blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; >> - >>       blnd_cfg.overlap_only = false; >>       blnd_cfg.global_gain = 0xff; >>   +    if (per_pixel_alpha && pipe_ctx->plane_state->global_alpha) { >> +        blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; >> +        blnd_cfg.global_gain = pipe_ctx->plane_state->global_alpha_value; >> +    } else if (per_pixel_alpha) { >> +        blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; >> +    } else { >> +        blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; >> +    } >> + > > Hi Melissa, > > Thanks a lot for this patch. I run your patch in our CI, and everything looks good from the IGT test result. > > In this sense: > Tested-by: Rodrigo Siqueira > > However, I think it is still necessary to have someone else review. > > Harry, Nick, or Zhan, what do you think about this change? > Looks good to me. Reviewed-by: Harry Wentland Harry > Thanks > Siqueira > >>       if (pipe_ctx->plane_state->global_alpha) >>           blnd_cfg.global_alpha = pipe_ctx->plane_state->global_alpha_value; >>       else >