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Thu, 4 Oct 2018 04:21:28 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Thu, 4 Oct 2018 04:21:28 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Thu, 4 Oct 2018 04:21:28 -0500 Received: from [172.24.190.89] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w949LNHv016709; Thu, 4 Oct 2018 04:21:25 -0500 Subject: Re: [PATCH 0/4] spi: add support for octal mode data transfer To: Yogesh Gaur , , , , , CC: , , , , , , References: <1538642920-3843-1-git-send-email-yogeshnarayan.gaur@nxp.com> From: Vignesh R Message-ID: <43cff872-0dc5-d3ce-ca35-082faa0e0e7c@ti.com> Date: Thu, 4 Oct 2018 14:52:18 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <1538642920-3843-1-git-send-email-yogeshnarayan.gaur@nxp.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Yogesh, On Thursday 04 October 2018 02:18 PM, Yogesh Gaur wrote: > Add support for octal mode IO data transfer. > Micron flash, mt35xu512aba, supports octal mode data transfer and > NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx). > > Patch series > * Add support for octal mode flags and parsing of same in spi driver. > * Add octal data communication commands required for mt35xu512aba [1] flash. > * Add support for Read and Write proto for (1-1-8/1-8-8) mode. > * Add mode bit required for octal mode in nxp-fspi driver [2]. > * Define binding property 'spi-rx/tx-bus-width' for LX2160ARDB target [2]. > > Tested on LX2160ARDB target with nxp-fspi driver, below are > Read performance number of 1-1-1 and 1-1-8 read protocol. > > root@lxxx:~# cat /proc/mtd > dev: size erasesize name > mtd0: 04000000 00001000 "spi0.0" > mtd1: 04000000 00001000 "spi0.1" > root@lxxx:~# time mtd_debug read /dev/mtd0 0x0 0x1000000 0read > Copied 16777216 bytes from address 0x00000000 in flash to 0read > > real 0m2.792s > user 0m0.000s > sys 0m2.790s > root@lxxx:~# time mtd_debug read /dev/mtd1 0x0 0x1000000 0read > Copied 16777216 bytes from address 0x00000000 in flash to 0read > > real 0m0.441s > user 0m0.000s > sys 0m0.440s > root@ls1012ardb:~# > > Flash device MTD0 configured in 1-1-1 protocol. > Flash device MTD1 configured in 1-1-8 protocol. > > [1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=66317 > [2] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=66887 > > Yogesh Gaur (4): > spi: add support for octal I/O data transfer > mtd: spi-nor: add support for octal mode data transfer > spi: nxp-fspi: add mode flag bit for octal support > arm64: dts: lx2160a: update fspi node This is a bit confusing and difficult to follow. I suggest to order patches such that spi-nor layer changes are at the first, then m25p80 related things, followed by spi-mem (if needed spi) changes and finally spi-mem controller driver changes. -- Regards Vignesh