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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ba455046223sm323271666b.49.2026.04.20.01.23.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 20 Apr 2026 01:23:01 -0700 (PDT) Message-ID: <43db2263-0dab-4652-ae1e-f827d1dc5c28@oss.qualcomm.com> Date: Mon, 20 Apr 2026 10:22:59 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] mailbox: qcom-cpucp: Add support for Nord CPUCP mailbox controller To: Shawn Guo , Jassi Brar Cc: Sibi Sankar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Dmitry Baryshkov , Bartosz Golaszewski , Deepti Jaggi , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20260420034932.1247344-1-shengchao.guo@oss.qualcomm.com> <20260420034932.1247344-3-shengchao.guo@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260420034932.1247344-3-shengchao.guo@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: fEGFkpkvxhm0VgHzqFHAC0BJ6z0pRt8t X-Proofpoint-ORIG-GUID: fEGFkpkvxhm0VgHzqFHAC0BJ6z0pRt8t X-Authority-Analysis: v=2.4 cv=SNFykuvH c=1 sm=1 tr=0 ts=69e5e268 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=iw6j4ArIhSFbxnb95OkA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIwMDA4MCBTYWx0ZWRfX79ue4EVOhSan Xfp20v8poUo89biWTTKe+4uxodwPbiLDJKdAl5wQLW5lXQqbTQCfdDE3G8cqZoTCa6UvFsXrnW6 ktxs8uwrWZ42V0E1GXXjdYIZmf+9L0exfzmg7DPzsM8R7KHlAL3wqRWCKERlas3uCx0muMCI+yV Ani3Lvhmu+/8QdfXHqthQM4iTqWVrGKqpOb5wBg6rjTbvRPXLDXFaFKdWhp8RDxRKcN7tztkjl2 Ln55ERkQJO7l15Pguq6TEmCAEKQ/SIQjrRGuZNzA9+3S/asLvTJgHt0ORaf74hDEEOi2X2wUliN BjQfcUOvs9JUFibt6JOhj2u0oBVUrrYiolzPhUmcHytj3XrTKYQC8obfovnk3s0Aytzu8tavGPW KVu4iHbWVm127s9tHK3oUI1M2UVqASU05xVaR7bjbShVtAbZgf7b9FogsM0rYC2bw5CbYzN7CZK 7S57l/eKwFmWhHfow2w== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-20_01,2026-04-17_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 phishscore=0 adultscore=0 malwarescore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604200080 On 4/20/26 5:49 AM, Shawn Guo wrote: > From: Deepti Jaggi > > The Nord SoC CPUCP mailbox supports 16 IPC channels, compared to 3 on > x1e80100. The existing driver hardcodes the channel count via a > compile-time constant (APSS_CPUCP_IPC_CHAN_SUPPORTED), making it > impossible to support hardware with a different number of channels. > > Introduce a qcom_cpucp_mbox_data per-hardware configuration struct that > carries the channel count, and retrieve it via of_device_get_match_data() > at probe time. Switch the channel array from a fixed-size member to a > dynamically allocated buffer sized from the hardware data. Update the > x1e80100 entry to supply its own data struct, and add a new Nord entry > with num_chans = 16. > > Signed-off-by: Deepti Jaggi > Signed-off-by: Shawn Guo > --- [...] > /** > * struct qcom_cpucp_mbox - Holder for the mailbox driver > - * @chans: The mailbox channel > + * @chans: The mailbox channels (dynamically allocated) I don't think this line is a valuable change The rest of the patch looks good Konrad