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Sun, 15 Mar 2026 23:06:40 -0700 (PDT) Message-ID: <4400f95392163ddc3997cbbc0b298f50910fe6f2.camel@gmail.com> Subject: Re: [PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support From: Ivan Mikhaylov To: Arnd Bergmann , Conor Dooley , aspeedyh Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Ryan Chen , Philipp Zabel , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, maciej.lawniczak@intel.com, Mark Brown Date: Mon, 16 Mar 2026 09:06:36 +0300 In-Reply-To: <23909400-4e7f-49c9-a982-14036372af98@app.fastmail.com> References: <20260313-upstream_espi-v1-0-9504428e1f43@aspeedtech.com> <20260313-energy-casket-ca8adc1f1fd1@spud> <23909400-4e7f-49c9-a982-14036372af98@app.fastmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2026-03-13 at 22:36 +0100, Arnd Bergmann wrote: > On Fri, Mar 13, 2026, at 17:24, Conor Dooley wrote: > > On Fri, Mar 13, 2026 at 06:07:35PM +0800, aspeedyh wrote: > > > This series adds initial support for the eSPI controller found on > > > ASPEED > > > AST2600 BMC SoCs. > > >=20 > > > The series introduces a eSPI controller framework for ASPEED SoCs > > > under > > > drivers/soc/aspeed/, adds AST2600-specific controller support for > > > peripheral and flash channels, defines the corresponding > > > devicetree=20 > > > binding, and adds the AST2600 eSPI controller node to the SoC > > > dtsi. > > >=20 > > > The driver is intended to support host-BMC communication over the > > > BMC-side > > > eSPI slave controller present on AST2600 systems. > >=20 > > This all seems to be in the wrong places entirely, shouldn't an > > eSPI > > driver and bindings go in the spi subsystem? >=20 > From an initial reading, my impression is that patches 1, 2, 3 and 7 > should be modified to use the normal SPI interfaces to implement > an spi target driver, possibly a combined host/target driver. > Reworking this should be fairly straightforward because the > interfaces > to the SPI core are well documented. Arnd, that's would be nice if it would be standard SPI device. But what if eSPI would be a bus? So, I assume all other which lying underneath=20 eSPI would be much easier to implement as standard driver data set SPI/GPIO/I2C with something like devm_regmap_init_espi(like for i2c/spi or anything else) for example as common part for these drivers. Thanks.