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Fri, 27 Mar 2026 13:44:09 +0000 (GMT) Message-ID: <44483f44-b2cc-4b5d-aedc-2972fd8ccfe7@linux.ibm.com> Date: Fri, 27 Mar 2026 19:14:09 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] sched/fair: Prefer fully-idle SMT core for NOHZ idle load balancer To: Andrea Righi , Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot Cc: Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , Christian Loehle , Koba Ko , Felix Abecassis , Balbir Singh , linux-kernel@vger.kernel.org References: <20260326151211.1862600-1-arighi@nvidia.com> <20260326151211.1862600-5-arighi@nvidia.com> Content-Language: en-US From: Shrikanth Hegde In-Reply-To: <20260326151211.1862600-5-arighi@nvidia.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-ORIG-GUID: A-Z8K9qnX_2wgimBNWY3Hzi_jNBW291b X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI3MDA5MSBTYWx0ZWRfX8JHQGoyXHCAe KdCdxNJHV5UCl20fEuN4BEP374n4y0Jn3+TTmul5rzCL6Jc7uWDx2WBkWxBu49s05oN+7m4xZyK 0C9BLO0eEPjZIeEH+IXvbW51eRp5//TGG6j41HAb/B43fciZsrjN7wyPr6E6bw6OC6Pg9fB9tqG mDG3HAQ2voYOB6px0PJ7/HolfXmlNFUK/DUypr4xhQq/QHUIbCMxvckv8yjwvbZF3GcfuDORCLv pJLMuVRtTCscku6mMXZk8ZjQxEhJ6axqJYA3pTRE/EbwbmRqi3CjYxnJlwnz6VDW+pevGxbOfj2 sGYVAZFTd5oDI+OEN94So3cfEHAEa+pX/FA3CtfCgxDxUjKYKnpZOe4nH4iAKLaB1fmOJhqZ8we aX54oWenFhecN6VQOcuVEkvmDDoFTCsq7/MSAED/sNt+So8akaApVdwdJQyykQB1gUxUwWKEl6V F0yU+ZqGboG0l4riEzQ== X-Authority-Analysis: v=2.4 cv=bLEb4f+Z c=1 sm=1 tr=0 ts=69c689b0 cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=iQ6ETzBq9ecOQQE5vZCe:22 a=KKAkSRfTAAAA:8 a=7CQSdrXTAAAA:8 a=Ikd4Dj_1AAAA:8 a=ky5f8AKq-0-IAGj2a44A:9 a=QEXdDO2ut3YA:10 a=cvBusfyB2V15izCimMoJ:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-GUID: urIorGqAGFHKXv7W_UIKSYKhZw-6o_47 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-26_04,2026-03-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 clxscore=1011 phishscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603270091 On 3/26/26 8:32 PM, Andrea Righi wrote: > When choosing which idle housekeeping CPU runs the idle load balancer, > prefer one on a fully idle core if SMT is active, so balance can migrate > work onto a CPU that still offers full effective capacity. Fall back to > any idle candidate if none qualify. > > Cc: Vincent Guittot > Cc: Dietmar Eggemann > Cc: Christian Loehle > Cc: Koba Ko > Reported-by: Felix Abecassis > Signed-off-by: Andrea Righi > --- > kernel/sched/fair.c | 19 +++++++++++++++++-- > 1 file changed, 17 insertions(+), 2 deletions(-) > > diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c > index 593a89f688679..a1ee21f7b32f6 100644 > --- a/kernel/sched/fair.c > +++ b/kernel/sched/fair.c > @@ -12733,11 +12733,15 @@ static inline int on_null_domain(struct rq *rq) > * - When one of the busy CPUs notices that there may be an idle rebalancing > * needed, they will kick the idle load balancer, which then does idle > * load balancing for all the idle CPUs. > + * > + * - When SMT is active, prefer a CPU on a fully idle core as the ILB > + * target, so that when it runs balance it becomes the destination CPU > + * and can accept migrated tasks with full effective capacity. > */ > static inline int find_new_ilb(void) > { > const struct cpumask *hk_mask; > - int ilb_cpu; > + int ilb_cpu, fallback = -1; > > hk_mask = housekeeping_cpumask(HK_TYPE_KERNEL_NOISE); > > @@ -12746,11 +12750,22 @@ static inline int find_new_ilb(void) > if (ilb_cpu == smp_processor_id()) > continue; > > +#ifdef CONFIG_SCHED_SMT > + if (!idle_cpu(ilb_cpu)) > + continue; > + > + if (fallback < 0) > + fallback = ilb_cpu; > + > + if (!sched_smt_active() || is_core_idle(ilb_cpu)) is_core_idle does loop for all sublings and nohz.idle_cpus_mask will have all siblings likely. So that might turn out be a bit expensive on large SMT system such as SMT=4 Also, this is with interrupt disabled. Will try to run this on powerpc system and see if simple benchmarks show anything. > + return ilb_cpu; > +#else > if (idle_cpu(ilb_cpu)) > return ilb_cpu; > +#endif > } > > - return -1; > + return fallback; > } > > /*