From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A891F3890FF; Wed, 25 Mar 2026 09:55:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774432530; cv=none; b=KfZlSzIrBs64B7lhqfnY7ekaTq5kfT4uu2lu4/Wl+tVRswo5wg796dx+Hh0ODicdRVx3UYDOZVpWz5JSj19Rhc+krDD06VtWUtZ0Kxt3GVAKJ4nucOo9rcFiuhNeYQ6Ty5ekfFN8sGA4Sosl1ghWyFATgD4BzFpbuCwS/62TMnI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774432530; c=relaxed/simple; bh=9SU+G1pzNfkJYWyyJavSVZlDryVqXa7NO/5Yp1+Hwuw=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Wj/m+n9UCqgLx6bfGfz0aO5j/WHpIy+XGxbEnqRO09hQonk3dGpJGRYBnrLqO0CCEIHBUzv1uDDaH27hVAEeYnOiZg7KUw/9x/QcbVNE1MZkRwXrr4Qir5JIA1T58+2FhTlNYskA03cvOgALNZF/aSfH6Dw2+vK4SNwTz15pAQ8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=imBvzxX9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="imBvzxX9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 09D20C4CEF7; Wed, 25 Mar 2026 09:55:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774432530; bh=9SU+G1pzNfkJYWyyJavSVZlDryVqXa7NO/5Yp1+Hwuw=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=imBvzxX9+0+DnwBNDpet8fwln6JuraH8UeljdObUd/dreDGMpuVgki8GeZzzgA0ZH UEEHqQjM5U224ArxpDQG887GBml3c6f2iUD/NMT3IGXrr0NyWJ/HKXxSjaONu1/BY6 MpNC+qIVdA6Cpxm18N8FeJe8hHeJL+S0Mhr/+C94T//PXLsSQruYgfnb/qUwKPZFs5 nAOdvVFm4risE9RhLWvnNsAblgkSRqz+4Ag+TeUglGR/y/J1hLhB+6+StjGhdpE47F SB5PEOKIc7sLFnTTVUf/+K1+x8sbYVgZjGuwCK2Gs/KxDlcSjel2O5nE2ef+qpPWT8 shCfc/A8KpMow== Message-ID: <44dd86c0-1845-4dd9-b4b4-2cef6d1c6357@kernel.org> Date: Wed, 25 Mar 2026 10:55:23 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 1/2] mm: make lazy MMU mode context-aware To: Alexander Gordeev , Kevin Brodsky , Andrew Morton , Gerald Schaefer , Heiko Carstens , Christian Borntraeger , Vasily Gorbik Cc: linux-s390@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org References: From: "David Hildenbrand (Arm)" Content-Language: en-US Autocrypt: addr=david@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 3/25/26 08:41, Alexander Gordeev wrote: > Lazy MMU mode is assumed to be context-independent, in the sense > that it does not need any additional information while operating. > However, the s390 architecture benefits from knowing the exact > page table entries being modified. > > Introduce lazy_mmu_mode_enable_pte(), which is provided with the > process address space and the page table being operated on. This > information is required to enable s390-specific optimizations. > > The function takes parameters that are typically passed to page- > table level walkers, which implies that the span of PTE entries > never crosses a page table boundary. > > Architectures that do not require such information simply do not > need to define the arch_enter_lazy_mmu_mode_pte() callback. > > Signed-off-by: Alexander Gordeev > --- > fs/proc/task_mmu.c | 2 +- > include/linux/pgtable.h | 42 +++++++++++++++++++++++++++++++++++++++++ > mm/madvise.c | 8 ++++---- > mm/memory.c | 8 ++++---- > mm/mprotect.c | 2 +- > mm/mremap.c | 2 +- > mm/vmalloc.c | 6 +++--- > 7 files changed, 56 insertions(+), 14 deletions(-) > > diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c > index e091931d7ca1..4e3b1987874a 100644 > --- a/fs/proc/task_mmu.c > +++ b/fs/proc/task_mmu.c > @@ -2752,7 +2752,7 @@ static int pagemap_scan_pmd_entry(pmd_t *pmd, unsigned long start, > return 0; > } > > - lazy_mmu_mode_enable(); > + lazy_mmu_mode_enable_pte(vma->vm_mm, start, end, start_pte); > > if ((p->arg.flags & PM_SCAN_WP_MATCHING) && !p->vec_out) { > /* Fast path for performing exclusive WP */ > diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h > index a50df42a893f..481b45954800 100644 > --- a/include/linux/pgtable.h > +++ b/include/linux/pgtable.h > @@ -271,6 +271,44 @@ static inline void lazy_mmu_mode_enable(void) > arch_enter_lazy_mmu_mode(); > } > > +#ifndef arch_enter_lazy_mmu_mode_pte > +static inline void arch_enter_lazy_mmu_mode_pte(struct mm_struct *mm, > + unsigned long addr, > + unsigned long end, > + pte_t *ptep) Two tab alignment please. (applies to other things hwere as well) > +{ > + arch_enter_lazy_mmu_mode(); > +} > +#endif > + > +/** > + * lazy_mmu_mode_enable_pte() - Enable the lazy MMU mode with parameters You have to be a lot clearer about implications. For example, what happens if we would bail out and not process all ptes? What are the exact semantics. > + * > + * Enters a new lazy MMU mode section; if the mode was not already enabled, > + * enables it and calls arch_enter_lazy_mmu_mode_pte(). > + * > + * Must be paired with a call to lazy_mmu_mode_disable(). > + * > + * Has no effect if called: > + * - While paused - see lazy_mmu_mode_pause() > + * - In interrupt context > + */ > +static inline void lazy_mmu_mode_enable_pte(struct mm_struct *mm, > + unsigned long addr, > + unsigned long end, > + pte_t *ptep) It can be multiple ptes, so should this be some kind of "pte_range"/ lazy_mmu_mode_enable_for_pte_range() A bit mouthful but clearer. > +{ > + struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > + > + if (in_interrupt() || state->pause_count > 0) > + return; > + > + VM_WARN_ON_ONCE(state->enable_count == U8_MAX); > + > + if (state->enable_count++ == 0) > + arch_enter_lazy_mmu_mode_pte(mm, addr, end, ptep); > +} I'm wondering whether that could instead be some optional interface that we trigger after the lazy_mmu_mode_enable. But looking at lazy_mmu_mode_enable() users, there don't seem to be cases where we would process multiple different ranges under a single enable() call, right? -- Cheers, David