From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751808AbbJFDIr (ORCPT ); Mon, 5 Oct 2015 23:08:47 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:59384 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751364AbbJFDIq (ORCPT ); Mon, 5 Oct 2015 23:08:46 -0400 X-AuditID: cbfee690-f794e6d0000014de-fe-56133b3c464d Date: Tue, 06 Oct 2015 03:08:44 +0000 (GMT) From: Sarbojit Ganguly Subject: Re: Re: Re: [PATCH v2] arm: Adding support for atomic half word exchange To: Will Deacon , Sarbojit Ganguly Cc: "linux@arm.linux.org.uk" , "catalin.marinas@arm.com" , "Waiman.Long@hp.com" , "peterz@infradead.org" , VIKRAM MUPPARTHI , "linux-kernel@vger.kernel.org" , SUNEEL KUMAR SURIMANI , SHARAN ALLUR , "torvalds@linux-foundation.org" , "linux-arm-kernel@lists.infradead.org" Reply-to: ganguly.s@samsung.com MIME-version: 1.0 X-MTR: 20151006030518971@ganguly.s Msgkey: 20151006030518971@ganguly.s X-EPLocale: en_US.windows-1252 X-Priority: 3 X-EPWebmail-Msg-Type: personal X-EPWebmail-Reply-Demand: 0 X-EPApproval-Locale: X-EPHeader: ML X-MLAttribute: X-RootMTR: 20151006030518971@ganguly.s X-ParentMTR: X-ArchiveUser: X-CPGSPASS: Y X-ConfirmMail: N,general Content-type: text/plain; charset=windows-1252 MIME-version: 1.0 Message-id: <451890683.5597891444100921604.JavaMail.weblogic@epmlwas01d> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrKIsWRmVeSWpSXmKPExsWyRsSkWtfGWjjMYM0WcYvLu+awOTB6fN4k F8AYxWWTkpqTWZZapG+XwJWxZJVKwS6Zio2LG5kbGG9IdzFycAgJqEj0TYroYuTkkBAwkfhw 9ScrhC0mceHeerYuRi6gkqWMEjdudTHCFM3tncYIkZjDCNS8CSzBAjRoVecysG42AX2J0/tf MoHYwgKBEh8WnAeLiwiESiz+sIMdpJlZYCWLxPSPx5hBEkIC8hLtL7aDNfAKCEqcnPmEBWKb kkTH0w+MEHFliZN/t7BDxOUklky9zARh80rMaH/KAhOf9nUNM4QtLXF+1gZGmHcWf38MFeeX OHZ7B1SvgMTUMwehatQlmh+ch7L5JNYsfMsCU7/r1HJmmF0NG39D3SAhsbXlCdhjzAKKElO6 H7JD2AYSRxbNYUX3C6+Ah0Trj34WkOclBHo5JJ7cPMA2gVFpFpK6WUhmzUIyC1nNAkaWVYyi qQXJBcVJ6UUmesWJucWleel6yfm5mxiBqeH0v2cTdjDeO2B9iFGAg1GJh1fiplCYEGtiWXFl 7iFGU2BETWSWEk3OByagvJJ4Q2MzIwtTE1NjI3NLMyVx3tdSP4OFBNITS1KzU1MLUovii0pz UosPMTJxcEo1MDbITaspNzy35XNGlcy6pY9XlAS071G8YP+z9GXVjaL7/8Tmh59+6+XU5er7 90qV5wLTtYWZrZ+NTzAkt5Y/CZqSGxQUk/Vpvehm+aiyzYr/O169OBvBOpddQ7TtlifXb/HZ kYVeD7/qmL4/pO+wVjOoc0JA55eUzTsVg/WCs9O3nCxWvttqqMRSnJFoqMVcVJwIAPQP45QI AwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrGKsWRmVeSWpSXmKPExsVy+t/tXl0ba+Ewg+9zBC0u75rD5sDo8XmT XABjVJpNRmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGuoaWFuZJCXmJuqq2Si0+ArltmDtBQ JYWyxJxSoFBAYnGxkr6dTVF+aUmqQkZ+cYmtUrShuZGekYGeqZGeoWmslaGBgZEpUE1CWsaS VSoFu2QqNi5uZG5gvCHdxcjBISSgItE3KaKLkZNDQsBEYm7vNEYIW0ziwr31bF2MXEAlcxiB ajaBJViA6ld1LmMFsdkE9CVO73/JBGILCwRKfFhwHiwuIhAqsfjDDnaQZmaBlSwS0z8eYwZJ CAnIS7S/2A7WwCsgKHFy5hMWiG1KEh1PPzBCxJUlTv7dwg4Rl5NYMvUyE4TNKzGj/SkLTHza 1zXMELa0xPlZG+CuXvz9MVScX+LY7R1QvQISU88chKpRl2h+cB7K5pNYs/AtC0z9rlPLmWF2 NWz8DXWDhMTWlidgjzELKEpM6X7IDmEbSBxZNIcV3S+8Ah4SrT/6WSYwys5CkpqFpH0WknZk NQsYWVYxiqYWJBcUJ6VXGOoVJ+YWl+al6yXn525iBKehZwt3MH45b32IUYCDUYmHV+KmUJgQ a2JZcWXuIUYJDmYlEd6fXMJhQrwpiZVVqUX58UWlOanFhxhNgdE2kVlKNDkfmCLzSuINjU3M TY1NLQwMzc3NlMR5b+xlCBMSSE8sSc1OTS1ILYLpY+LglGpg7DPcUTGxd90xa3kjo4OChkGu U3TSNFKznl4vcLm0m309/84OwUt/vGUUco0ULjEeMODL2LFVrjkjxKXcYNqm2lyjUHu54r+B zom+nev2vy7muuo7S4jns8SDrqYphyZcvz5J686mc+xqH/Z6n3e6U1DycdmSA82PZzxUipDp zTrcnN7eU/pTiaU4I9FQi7moOBEAI0woPlkDAAA= DLP-Filter: Pass X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id t9638qqZ011954 Hello Will, Thank you so much for the review. I have thought it over and it makes sense not to have that comment in cmpxchg.h, I will also change !defined to #ifndef and quickly post a v3. Regards, Sarbojit ------- Original Message ------- Sender : Will Deacon Date : Oct 05, 2015 21:30 (GMT+05:30) Title : Re: Re: [PATCH v2] arm: Adding support for atomic half word exchange On Mon, Oct 05, 2015 at 01:10:53PM +0000, Sarbojit Ganguly wrote: > My sincere apologies for the format issue. This was due to the e-mail editor > which reformats the text. > I am reposting the patch, please let me know if it is ok this time. > > > v1-->v2 : Extended the guard code to cover the byte exchange case as > well following opinion of Will Deacon. > Checkpatch has been run and issues were taken care of. > > Since support for half-word atomic exchange was not there and Qspinlock > on ARM requires it, modified __xchg() to add support for that as well. > ARMv6 and lower does not support ldrex{b,h} so, added a guard code > to prevent build breaks. > > Signed-off-by: Sarbojit Ganguly > --- > arch/arm/include/asm/cmpxchg.h | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h > index 916a274..a53cbeb 100644 > --- a/arch/arm/include/asm/cmpxchg.h > +++ b/arch/arm/include/asm/cmpxchg.h > @@ -39,6 +39,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size > > switch (size) { > #if __LINUX_ARM_ARCH__ >= 6 > +#if !defined(CONFIG_CPU_V6) #ifndef ? (to match the __cmpxchg code). > case 1: > asm volatile("@ __xchg1\n" > "1: ldrexb %0, [%3]\n" > @@ -49,6 +50,22 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size > : "r" (x), "r" (ptr) > : "memory", "cc"); > break; > + > + /* > + * Half-word atomic exchange, required > + * for Qspinlock support on ARM. > + */ I think I said it before, but I don't think this comment is of any real value. Other than those, this looks ok to me. Will ????? ??? ?? ?? ?? ----------------------------------------------------------------------+ The Tao lies beyond Yin and Yang. It is silent and still as a pool of water. | It does not seek fame, therefore nobody knows its presence. | It does not seek fortune, for it is complete within itself. | It exists beyond space and time. | ----------------------------------------------------------------------+{.n++%ݶw{.n+{G{ayʇڙ,jfhz_(階ݢj"mG?&~iOzv^m ?I