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From: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
To: Rob Herring <robh@kernel.org>
Cc: "bhelgaas@google.com" <bhelgaas@google.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"Joao.Pinto@synopsys.com" <Joao.Pinto@synopsys.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"kishon@ti.com" <kishon@ti.com>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v3 01/10] bindings: PCI: designware: Example update
Date: Mon, 16 Apr 2018 09:37:42 +0100	[thread overview]
Message-ID: <452a9fc7-872d-05d4-289c-84ec58c0bee9@synopsys.com> (raw)
In-Reply-To: <20180413213427.3ny7ids3q7yxf35g@rob-hp-laptop>

Hi Rob,

On 13/04/2018 22:34, Rob Herring wrote:
> On Tue, Apr 10, 2018 at 01:58:33PM +0100, Gustavo Pimentel wrote:
>> Replaces "ctrlreg" reg-name by "dbi" to be coherent with similar drivers,
>> however it still be compatible with any previous DT that uses the old
>> reg-name.
>>
>> Replaces the PCIe base address example by a real PCIe base address in use.
>>
>> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
>> ---
>> Changes v1->v2:
>>  - Removed any iATU reference or changes to avoid confusion.
>>  - Add "snps,dw-pcie" compatible string following Kishon's suggestion.
>> Changes v2->v3:
>> - Nothing changed, just to follow the patch set version.
>>
>>  Documentation/devicetree/bindings/pci/designware-pcie.txt | 14 +++++++-------
>>  1 file changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> index 1da7ade..f02cd20 100644
>> --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> @@ -1,7 +1,8 @@
>>  * Synopsys DesignWare PCIe interface
>>  
>>  Required properties:
>> -- compatible: should contain "snps,dw-pcie" to identify the core.
>> +- compatible:
>> +	"snps,dw-pcie-rc", "snps,dw-pcie" for RC mode;
> 
> I think adding this compatible is pointless. "snps,dw-pcie" meant RC and 
> should continue to mean that. We also have compatibles with the IP 
> version number as well as the SoC specific compatible strings. We don't 
> need 4 compatible strings here.

Ok.

> 
> Rob
> 

Thanks,
Gustavo

  reply	other threads:[~2018-04-16  8:38 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-10 12:58 [PATCH v3 00/10] Designware EP support and code clean up Gustavo Pimentel
2018-04-10 12:58 ` [PATCH v3 01/10] bindings: PCI: designware: Example update Gustavo Pimentel
2018-04-13 21:34   ` Rob Herring
2018-04-16  8:37     ` Gustavo Pimentel [this message]
2018-04-10 12:58 ` [PATCH v3 02/10] PCI: dwc: Add support for endpoint mode Gustavo Pimentel
2018-04-10 12:58 ` [PATCH v3 03/10] PCI: endpoint: functions/pci-epf-test: Add second entry Gustavo Pimentel
2018-04-10 12:58 ` [PATCH v3 04/10] bindings: PCI: designware: Add support for the EP in Designware driver Gustavo Pimentel
2018-04-10 12:58 ` [PATCH v3 05/10] PCI: Adds device ID for Synopsys Sample Endpoint Gustavo Pimentel
2018-04-10 12:58 ` [PATCH v3 06/10] misc: pci_endpoint_test: Add designware EP entry Gustavo Pimentel
2018-04-10 12:58 ` [PATCH v3 07/10] PCI: dwc: Define maximum number of vectors Gustavo Pimentel
2018-04-10 12:58 ` [PATCH v3 08/10] PCI: dwc: Replace lower into upper case characters Gustavo Pimentel
2018-04-10 12:58 ` [PATCH v3 09/10] PCI: dwc: Small computation improvement Gustavo Pimentel
2018-04-10 12:58 ` [PATCH v3 10/10] PCI: dwc: Replace magic number by defines Gustavo Pimentel

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