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Wed, 6 May 2026 09:06:21 +0000 (GMT) From: Sayali Patil To: linuxppc-dev@lists.ozlabs.org, maddy@linux.ibm.com Cc: linux-kernel@vger.kernel.org, Ritesh Harjani , Mahesh Salgaonkar , sshegde@linux.ibm.com, chleroy@kernel.org Subject: [PATCH 2/3] lkdtm/powerpc: add isync after slbmte to enforce SLB update ordering Date: Wed, 6 May 2026 14:36:13 +0530 Message-ID: <4539b61bb6ff2e4fb89e89f760c11714d9ad26a1.1778057685.git.sayalip@linux.ibm.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA2MDA4OCBTYWx0ZWRfX0969AEjLd5I9 pZwDRhH2/H9CX6fF1mYDcR/Hs+hviNB9RZwuJc0PjTk+UNEDANwp3/aEwsKSYgwmyX7nnKl5FaY Dd18Ljwcj3b+s8SzGlrGkVyC1mWbFSHPG8g7wYjBDvNRjkT2gDH97DDcrKSpMmbpJwO88QtRawC Zt74FGLSkZgN+dypHFnhLaAJXdBXy0QIHXhYC6xVbl+uNqkETVmOa9japrzUV357XikV4FQz9S/ 5tMa7KgZFR3EyCzGdDV++nlRKMTHwtuAZv3vn9UaghiOgCOU98WA08CqhXu+sA9IqNgNjHEfqqV A4TYf7OquV1sEzblQENfxNxw5FIa9xj625CuURPA0jBLoYxH+yiGiDF8NGyQ65/C3aXINUvoINo tRlAVG6zygM4iSpPzDjn5XP5yo+hNmNDR4mWVEfwcCGGd2L/cxSDNN1jYan8dHqSPNQqw3ZJz3+ AVD6zwC7RrfaEL8PSsg== X-Proofpoint-ORIG-GUID: CMX9D9jXvKVn5u_CIba_zCvW4JPIw-i- X-Proofpoint-GUID: mp04mQzhU-H8FN_c6NOy0rVnx9qpngQq X-Authority-Analysis: v=2.4 cv=W7UIkxWk c=1 sm=1 tr=0 ts=69fb0495 cx=c_pps a=AfN7/Ok6k8XGzOShvHwTGQ==:117 a=AfN7/Ok6k8XGzOShvHwTGQ==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=uAbxVGIbfxUO_5tXvNgY:22 a=pGLkceISAAAA:8 a=VnNF1IyMAAAA:8 a=kezLWu8HVOdeeWrntvsA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-05_03,2026-04-30_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 lowpriorityscore=0 malwarescore=0 suspectscore=0 spamscore=0 clxscore=1015 phishscore=0 bulkscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605060088 The slbmte instruction modifies the Segment Lookaside Buffer, but without a context synchronizing operation the CPU is not guaranteed to observe the updated SLB state for subsequent instructions. This can result in use of stale translation state when memory is accessed immediately after SLB modifications. Add isync after each slbmte in the PPC_SLB_MULTIHIT test to ensure proper ordering of SLB updates before subsequent memory accesses. This aligns with Power ISA context synchronization requirements for changes in address translation state and improves the reliability of SLB multihit injection tests in hash MMU mode. Suggested-by: Ritesh Harjani (IBM) Signed-off-by: Sayali Patil --- drivers/misc/lkdtm/powerpc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/misc/lkdtm/powerpc.c b/drivers/misc/lkdtm/powerpc.c index be385449911a..ef07e5201edf 100644 --- a/drivers/misc/lkdtm/powerpc.c +++ b/drivers/misc/lkdtm/powerpc.c @@ -17,11 +17,14 @@ static void insert_slb_entry(unsigned long p, int ssize, int page_size) : "r" (mk_vsid_data(p, ssize, flags)), "r" (mk_esid_data(p, ssize, SLB_NUM_BOLTED)) : "memory"); + isync(); asm volatile("slbmte %0,%1" : : "r" (mk_vsid_data(p, ssize, flags)), "r" (mk_esid_data(p, ssize, SLB_NUM_BOLTED + 1)) : "memory"); + isync(); + preempt_enable(); } @@ -84,6 +87,7 @@ static void insert_dup_slb_entry_0(void) : "r" (vsid), "r" (esid | SLB_NUM_BOLTED) : "memory"); + isync(); asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i)); asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i)); @@ -93,6 +97,7 @@ static void insert_dup_slb_entry_0(void) : "r" (vsid), "r" (esid | (SLB_NUM_BOLTED + 1)) : "memory"); + isync(); pr_info("%s accessing test address 0x%lx: 0x%lx\n", __func__, test_address, *test_ptr); -- 2.52.0