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Wed, 12 Nov 2025 13:03:23 -0600 Received: from [10.249.42.149] ([10.249.42.149]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 5ACJ3MvJ3202957; Wed, 12 Nov 2025 13:03:22 -0600 Message-ID: <454220b7-81cc-4450-812c-06bfbe527ee2@ti.com> Date: Wed, 12 Nov 2025 13:03:22 -0600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/2] mfd: tps65219: Implement LOCK register handling for TPS65214 To: "Kory Maincent (TI.com)" , Aaro Koskinen , Andreas Kemnade , Kevin Hilman , Roger Quadros , Tony Lindgren , Lee Jones , Shree Ramamoorthy , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Bajjuri Praneeth , Thomas Petazzoni , , , , References: <20251112-fix_tps65219-v4-0-696a0f55d5d8@bootlin.com> <20251112-fix_tps65219-v4-1-696a0f55d5d8@bootlin.com> Content-Language: en-US From: Andrew Davis In-Reply-To: <20251112-fix_tps65219-v4-1-696a0f55d5d8@bootlin.com> Content-Type: text/plain; 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X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 19:03:29.7237 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 48331d56-8103-4fb6-7337-08de221e2af7 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.21.194];Helo=[flwvzet200.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0FD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR10MB7921 On 11/12/25 9:14 AM, Kory Maincent (TI.com) wrote: > The TPS65214 PMIC variant has a LOCK_REG register that prevents writes to > nearly all registers when locked. Unlock the registers at probe time and > leave them unlocked permanently. > > This approach is justified because: > - Register locking is very uncommon in typical system operation > - No code path is expected to lock the registers during runtime Any other entity in the system that could re-lock these registers? How about low power modes or other PM handling? > - Adding a custom regmap write function would add overhead to every > register write, including voltage changes triggered by CPU OPP > transitions from the cpufreq governor which could happen quite > frequently > > Cc: stable@vger.kernel.org > Fixes: 7947219ab1a2d ("mfd: tps65219: Add support for TI TPS65214 PMIC") > Signed-off-by: Kory Maincent (TI.com) > --- > Changes in v4: > - Move the registers unlock in the probe instead of a custom regmap write > operation. > > Changes in v3: > - Removed unused variable. > > Changes in v2: > - Setup a custom regmap_bus only for the TPS65214 instead of checking > the chip_id every time reg_write is called. > --- > drivers/mfd/tps65219.c | 7 +++++++ > include/linux/mfd/tps65219.h | 2 ++ > 2 files changed, 9 insertions(+) > > diff --git a/drivers/mfd/tps65219.c b/drivers/mfd/tps65219.c > index 65a952555218d..f1115c5585545 100644 > --- a/drivers/mfd/tps65219.c > +++ b/drivers/mfd/tps65219.c > @@ -498,6 +498,13 @@ static int tps65219_probe(struct i2c_client *client) > return ret; > } > > + if (chip_id == TPS65214) { > + ret = i2c_smbus_write_byte_data(client, TPS65214_REG_LOCK, > + TPS65214_LOCK_ACCESS_CMD); > + if (ret) > + return ret; Might be good to print out some error message here, otherwise LGTM, Reviewed-by: Andrew Davis > + } > + > ret = devm_regmap_add_irq_chip(tps->dev, tps->regmap, client->irq, > IRQF_ONESHOT, 0, pmic->irq_chip, > &tps->irq_data); > diff --git a/include/linux/mfd/tps65219.h b/include/linux/mfd/tps65219.h > index 55234e771ba73..3abf937191d0c 100644 > --- a/include/linux/mfd/tps65219.h > +++ b/include/linux/mfd/tps65219.h > @@ -149,6 +149,8 @@ enum pmic_id { > #define TPS65215_ENABLE_LDO2_EN_MASK BIT(5) > #define TPS65214_ENABLE_LDO1_EN_MASK BIT(5) > #define TPS65219_ENABLE_LDO4_EN_MASK BIT(6) > +/* Register Unlock */ > +#define TPS65214_LOCK_ACCESS_CMD 0x5a > /* power ON-OFF sequence slot */ > #define TPS65219_BUCKS_LDOS_SEQUENCE_OFF_SLOT_MASK GENMASK(3, 0) > #define TPS65219_BUCKS_LDOS_SEQUENCE_ON_SLOT_MASK GENMASK(7, 4) >