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([2a01:e0a:3d9:2080:5c8d:8a1e:ea2b:c939]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45b7e8879cesm194388675e9.12.2025.09.02.04.59.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 02 Sep 2025 04:59:05 -0700 (PDT) Message-ID: <455375d4-c558-4d0e-9284-23905c8d0bac@linaro.org> Date: Tue, 2 Sep 2025 13:59:04 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Reply-To: Neil Armstrong Subject: Re: [PATCH v2 3/5] dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document static lanes mapping To: Konrad Dybcio , Andrzej Hajda , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Bjorn Andersson , Konrad Dybcio Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org References: <20250902-topic-x1e80100-hdmi-v2-0-f4ccf0ef79ab@linaro.org> <20250902-topic-x1e80100-hdmi-v2-3-f4ccf0ef79ab@linaro.org> <4dff9cc2-2152-48a0-b8ab-eea57ce2ace2@oss.qualcomm.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro In-Reply-To: <4dff9cc2-2152-48a0-b8ab-eea57ce2ace2@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 02/09/2025 13:50, Konrad Dybcio wrote: > On 9/2/25 11:00 AM, Neil Armstrong wrote: >> The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top >> of a combo glue to route either lanes to the 4 shared physical lanes. >> >> The routing of the lanes can be: >> - 2 DP + 2 USB3 >> - 4 DP >> - 2 USB3 >> >> The layout of the lanes was designed to be mapped and swapped >> related to the USB-C Power Delivery negociation, so it supports >> a finite set of mappings inherited by the USB-C Altmode layouts. >> >> Nevertheless those QMP Comby PHY can be statically used to >> drive a DisplayPort connector, DP->HDMI bridge, USB3 A Connector, >> etc... without an USB-C connector and no PD events. >> >> Add a property that documents the static lanes mapping to >> each underlying PHY to allow supporting boards directly >> connecting USB3 and DisplayPort lanes to the QMP Combo >> lanes. >> >> Signed-off-by: Neil Armstrong >> --- >> .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 29 ++++++++++++++++++++++ >> 1 file changed, 29 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml >> index c8bc512df08b5694c8599f475de78679a4438449..12511a462bc6245e0b82726d053d8605148c5047 100644 >> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml >> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml >> @@ -76,6 +76,35 @@ properties: >> mode-switch: true >> orientation-switch: true >> >> + qcom,static-lanes-mapping: >> + $ref: /schemas/types.yaml#/definitions/uint32-array >> + minItems: 4 >> + items: >> + enum: >> + - 0 # Unconnected (PHY_NONE) >> + - 4 # USB3 (PHY_TYPE_USB3) >> + - 6 # DisplayPort (PHY_TYPE_DP) >> + description: >> + Describes the static mapping of the Combo PHY lanes, when not used >> + a in a Type-C dynamic setup using USB-C PD Events to change the mapping. >> + The 4 lanes can either routed to the underlying DP PHY or the USB3 PHY. >> + Only 2 of the lanes can be connected to the USB3 PHY, but the 4 lanes can >> + be connected to the DP PHY. >> + The numbers corresponds to the PHY Type the lanes are connected to. >> + The possible combinations are >> + <0 0 0 0> when none are connected >> + <4 4 0 6> USB3 and DP single lane >> + <4 4 6 6> USB3 and DP >> + <6 6 4 4> DP and USB3 >> + <6 0 4 4> DP and USB3 single lane >> + <4 4 0 0> USB3 Only >> + <0 0 4 4> USB3 Only >> + <6 0 0 0> DP single lane >> + <0 0 0 6> DP single lane >> + <6 6 0 0> DP 2 lanes >> + <0 0 6 6> DP 2 lanes >> + <6 6 6 6> DP 4 lanes > > Would > > oneOf: > - [0, 0, 0, 0] > - ... > > or something similar work here? I need to check, but I may need to do that instead: oneOf: - items: - 0 - 0 - 0 - 0 - items: - 4 - 4 - 6 - 6 ... But I want to be extra sure this is the right path before Neil > > Konrad