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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ae35365a016sm153479966b.57.2025.06.27.09.21.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Jun 2025 09:21:49 -0700 (PDT) Message-ID: <4556893f-982b-435d-aed1-d661ee31f862@oss.qualcomm.com> Date: Fri, 27 Jun 2025 18:21:47 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net-next v5 03/14] net: ethernet: qualcomm: Add PPE driver for IPQ9574 SoC To: Luo Jie , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lei Wei , Suruchi Agarwal , Pavithra R , Simon Horman , Jonathan Corbet , Kees Cook , "Gustavo A. R. Silva" , Philipp Zabel Cc: linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-hardening@vger.kernel.org, quic_kkumarcs@quicinc.com, quic_linchen@quicinc.com References: <20250626-qcom_ipq_ppe-v5-0-95bdc6b8f6ff@quicinc.com> <20250626-qcom_ipq_ppe-v5-3-95bdc6b8f6ff@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250626-qcom_ipq_ppe-v5-3-95bdc6b8f6ff@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjI3MDEzMyBTYWx0ZWRfXzrKbs+oWrduE SQnNP3mcNIz21b4cIc1HCkuoSDD5NWNMRN89PA0Wx7OGKAqQX76xpoSZJJuHRBD5DWPChbH9Jal MNMj2jfCxVMLsns6a6+8/3tyQX7vqsyfKUSLVj16BbFKkWvw86b9FbuMkConQAlFGek4XnX/2Od VCPi/IFjARTulPT40ZDjD5petwrNOBYBCU/GnwfQYxGwJk8WPh2JlcbLbdKweqJt9LrT9IN3MwE lqXkicAFFndsBp8CUY9WBZ8MZ+MIQ7o+hvaEfC2Jjwff5o/QuOin1mPUNTlRtPe4U2cqqrydRkz y6V4xyM8L1qKO9z/hsOvotSqcXUbEC+8oh/jEqC8xuLcZrv6XDWbtIcUjFK8WZjpQedY6YT9VXB axDl3b+FzL43FnvitGZWUpm6IfEtI4+iD8DKNFrZtxIFm6y2oa0c9d0i/mpswzbLOECcRwqX X-Authority-Analysis: v=2.4 cv=XPQwSRhE c=1 sm=1 tr=0 ts=685ec520 cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=6IFa9wvqVegA:10 a=COk6AnOGAAAA:8 a=JRFc35xCpNCPHeNcAxQA:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: t3wbClGvYjKqsAuv1Zcu9h42Rcpbs4tF X-Proofpoint-ORIG-GUID: t3wbClGvYjKqsAuv1Zcu9h42Rcpbs4tF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-06-27_05,2025-06-26_05,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 clxscore=1015 suspectscore=0 mlxscore=0 spamscore=0 phishscore=0 malwarescore=0 mlxlogscore=999 bulkscore=0 priorityscore=1501 adultscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506270133 On 6/26/25 4:31 PM, Luo Jie wrote: > The PPE (Packet Process Engine) hardware block is available on Qualcomm > IPQ SoC that support PPE architecture, such as IPQ9574. > > The PPE in IPQ9574 includes six integrated ethernet MAC for 6 PPE ports, > buffer management, queue management and scheduler functions. The MACs > can connect with the external PHY or switch devices using the UNIPHY PCS > block available in the SoC. > > The PPE also includes various packet processing offload capabilities > such as L3 routing and L2 bridging, VLAN and tunnel processing offload. > It also includes Ethernet DMA function for transferring packets between > ARM cores and PPE ethernet ports. > > This patch adds the base source files and Makefiles for the PPE driver > such as platform driver registration, clock initialization, and PPE > reset routines. > > Signed-off-by: Luo Jie > --- [...] > +static int ppe_clock_init_and_reset(struct ppe_device *ppe_dev) > +{ > + unsigned long ppe_rate = ppe_dev->clk_rate; > + struct device *dev = ppe_dev->dev; > + struct reset_control *rstc; > + struct clk_bulk_data *clks; > + struct clk *clk; > + int ret, i; > + > + for (i = 0; i < ppe_dev->num_icc_paths; i++) { > + ppe_dev->icc_paths[i].name = ppe_icc_data[i].name; > + ppe_dev->icc_paths[i].avg_bw = ppe_icc_data[i].avg_bw ? : > + Bps_to_icc(ppe_rate); > + ppe_dev->icc_paths[i].peak_bw = ppe_icc_data[i].peak_bw ? : > + Bps_to_icc(ppe_rate); > + } Can you not just set ppe_dev->icc_paths to ppe_icc_data? Konrad