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Fri, 11 Apr 2025 10:42:56 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 53BAgsxe023310 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Apr 2025 10:42:54 GMT Received: from [10.218.7.247] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 11 Apr 2025 03:42:49 -0700 Message-ID: <4557abf9-bcd2-4a06-8161-43ad5047b277@quicinc.com> Date: Fri, 11 Apr 2025 16:12:46 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V3 5/9] phy: qcom-qmp-ufs: Remove qmp_ufs_com_init() To: Dmitry Baryshkov CC: , , , , , , , , , , , , , References: <20250410090102.20781-1-quic_nitirawa@quicinc.com> <20250410090102.20781-6-quic_nitirawa@quicinc.com> Content-Language: en-US From: Nitin Rawat In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=VbH3PEp9 c=1 sm=1 tr=0 ts=67f8f230 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=zrGcixpFwRRgDh-WtYsA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: we9ozuFQS9tgll9GJNrL-apAvrxpPXbM X-Proofpoint-ORIG-GUID: we9ozuFQS9tgll9GJNrL-apAvrxpPXbM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-11_04,2025-04-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 impostorscore=0 suspectscore=0 adultscore=0 spamscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 bulkscore=0 mlxscore=0 mlxlogscore=999 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504110067 On 4/11/2025 1:39 AM, Dmitry Baryshkov wrote: > On Thu, Apr 10, 2025 at 02:30:58PM +0530, Nitin Rawat wrote: >> Simplify the qcom ufs phy driver by inlining qmp_ufs_com_init() into >> qmp_ufs_power_on(). This change removes unnecessary function calls and >> ensures that the initialization logic is directly within the power-on >> routine, maintaining the same functionality. > > Which problem is this patch trying to solve? Hi Dmitry, As part of the patch, I simplified the code by moving qmp_ufs_com_init inline to qmp_ufs_power_on, since qmp_ufs_power_on was merely calling qmp_ufs_com_init. This change eliminates unnecessary function call. Regards, Nitin > >> >> Signed-off-by: Nitin Rawat >> --- >> drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 44 ++++++++++--------------- >> 1 file changed, 18 insertions(+), 26 deletions(-) >> >> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c >> index 12dad28cc1bd..2cc819089d71 100644 >> --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c >> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c >> @@ -1757,31 +1757,6 @@ static void qmp_ufs_init_registers(struct qmp_ufs *qmp, const struct qmp_phy_cfg >> qmp_ufs_init_all(qmp, &cfg->tbls_hs_b); >> } >> >> -static int qmp_ufs_com_init(struct qmp_ufs *qmp) >> -{ >> - const struct qmp_phy_cfg *cfg = qmp->cfg; >> - void __iomem *pcs = qmp->pcs; >> - int ret; >> - >> - ret = regulator_bulk_enable(cfg->num_vregs, qmp->vregs); >> - if (ret) { >> - dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret); >> - return ret; >> - } >> - >> - ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks); >> - if (ret) >> - goto err_disable_regulators; >> - >> - qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN); >> - >> - return 0; >> - >> -err_disable_regulators: >> - regulator_bulk_disable(cfg->num_vregs, qmp->vregs); >> - >> - return ret; >> -} >> >> static int qmp_ufs_com_exit(struct qmp_ufs *qmp) >> { >> @@ -1799,10 +1774,27 @@ static int qmp_ufs_com_exit(struct qmp_ufs *qmp) >> static int qmp_ufs_power_on(struct phy *phy) >> { >> struct qmp_ufs *qmp = phy_get_drvdata(phy); >> + const struct qmp_phy_cfg *cfg = qmp->cfg; >> + void __iomem *pcs = qmp->pcs; >> int ret; >> + >> dev_vdbg(qmp->dev, "Initializing QMP phy\n"); >> >> - ret = qmp_ufs_com_init(qmp); >> + ret = regulator_bulk_enable(cfg->num_vregs, qmp->vregs); >> + if (ret) { >> + dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret); >> + return ret; >> + } >> + >> + ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks); >> + if (ret) >> + goto err_disable_regulators; >> + >> + qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN); >> + return 0; >> + >> +err_disable_regulators: >> + regulator_bulk_disable(cfg->num_vregs, qmp->vregs); >> return ret; >> } >> >> -- >> 2.48.1 >> >