mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Gavin Shan <gshan@redhat.com>
To: Ben Horgan <ben.horgan@arm.com>, james.morse@arm.com
Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com,
	baolin.wang@linux.alibaba.com, bobo.shaobowang@huawei.com,
	carl@os.amperecomputing.com, catalin.marinas@arm.com,
	dakr@kernel.org, dave.martin@arm.com, david@redhat.com,
	dfustini@baylibre.com, fenghuay@nvidia.com,
	gregkh@linuxfoundation.org, guohanjun@huawei.com,
	jeremy.linton@arm.com, jonathan.cameron@huawei.com,
	kobak@nvidia.com, lcherian@marvell.com, lenb@kernel.org,
	linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, lpieralisi@kernel.org,
	peternewman@google.com, quic_jiles@quicinc.com,
	rafael@kernel.org, robh@kernel.org, rohit.mathew@arm.com,
	scott@os.amperecomputing.com, sdonthineni@nvidia.com,
	sudeep.holla@arm.com, tan.shaopeng@fujitsu.com, will@kernel.org,
	xhao@linux.alibaba.com,
	Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>,
	Zeng Heng <zengheng4@huawei.com>
Subject: Re: [PATCH v5 01/34] ACPI / PPTT: Add a helper to fill a cpumask from a processor container
Date: Wed, 19 Nov 2025 13:35:03 +1000	[thread overview]
Message-ID: <455c577a-2c6b-4d57-9547-8f55bfe1c126@redhat.com> (raw)
In-Reply-To: <20251117170014.4113754-2-ben.horgan@arm.com>

Hi Ben,

On 11/18/25 2:59 AM, Ben Horgan wrote:
> From: James Morse <james.morse@arm.com>
> 
> The ACPI MPAM table uses the UID of a processor container specified in
> the PPTT to indicate the subset of CPUs and cache topology that can
> access each MPAM System Component (MSC).
> 
> This information is not directly useful to the kernel. The equivalent
> cpumask is needed instead.
> 
> Add a helper to find the processor container by its id, then walk
> the possible CPUs to fill a cpumask with the CPUs that have this
> processor container as a parent.
> 
> CC: Dave Martin <dave.martin@arm.com>
> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com>
> Reviewed-by: Gavin Shan <gshan@redhat.com>
> Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
> Tested-by: Fenghua Yu <fenghuay@nvidia.com>
> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
> Tested-by: Peter Newman <peternewman@google.com>
> Tested-by: Carl Worth <carl@os.amperecomputing.com>
> Tested-by: Gavin Shan <gshan@redhat.com>
> Tested-by: Zeng Heng <zengheng4@huawei.com>
> Signed-off-by: James Morse <james.morse@arm.com>
> Signed-off-by: Ben Horgan <ben.horgan@arm.com>
> ---
> Changes since v4:
> Remove blank line
> 
> Changes since v3:
> Refer to processor hierarchy in comments (Jonathan)
> Fix indent (Jonathan)
> ---
>   drivers/acpi/pptt.c  | 84 ++++++++++++++++++++++++++++++++++++++++++++
>   include/linux/acpi.h |  3 ++
>   2 files changed, 87 insertions(+)
> 

Since this series may need another respin, a nitpick below...

> diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c
> index 54676e3d82dd..b8248c0092fe 100644
> --- a/drivers/acpi/pptt.c
> +++ b/drivers/acpi/pptt.c
> @@ -817,3 +817,87 @@ int find_acpi_cpu_topology_hetero_id(unsigned int cpu)
>   	return find_acpi_cpu_topology_tag(cpu, PPTT_ABORT_PACKAGE,
>   					  ACPI_PPTT_ACPI_IDENTICAL);
>   }
> +
> +/**
> + * acpi_pptt_get_child_cpus() - Find all the CPUs below a PPTT
> + * processor hierarchy node
> + *
> + * @table_hdr:		A reference to the PPTT table
> + * @parent_node:	A pointer to the processor hierarchy node in the
> + *			table_hdr
> + * @cpus:		A cpumask to fill with the CPUs below @parent_node
> + *
> + * Walks up the PPTT from every possible CPU to find if the provided
> + * @parent_node is a parent of this CPU.
> + */
> +static void acpi_pptt_get_child_cpus(struct acpi_table_header *table_hdr,
> +				     struct acpi_pptt_processor *parent_node,
> +				     cpumask_t *cpus)
> +{
> +	struct acpi_pptt_processor *cpu_node;
> +	u32 acpi_id;
> +	int cpu;
> +
> +	cpumask_clear(cpus);
> +

The CPU mask has been cleared in its only caller acpi_pptt_get_cpus_from_container(),
no need to clear it again.

> +	for_each_possible_cpu(cpu) {
> +		acpi_id = get_acpi_id_for_cpu(cpu);
> +		cpu_node = acpi_find_processor_node(table_hdr, acpi_id);
> +
> +		while (cpu_node) {
> +			if (cpu_node == parent_node) {
> +				cpumask_set_cpu(cpu, cpus);
> +				break;
> +			}
> +			cpu_node = fetch_pptt_node(table_hdr, cpu_node->parent);
> +		}
> +	}
> +}
> +
> +/**
> + * acpi_pptt_get_cpus_from_container() - Populate a cpumask with all CPUs in a
> + *                                       processor container
> + * @acpi_cpu_id:	The UID of the processor container
> + * @cpus:		The resulting CPU mask
> + *
> + * Find the specified Processor Container, and fill @cpus with all the cpus
> + * below it.
> + *
> + * Not all 'Processor Hierarchy' entries in the PPTT are either a CPU
> + * or a Processor Container, they may exist purely to describe a
> + * Private resource. CPUs have to be leaves, so a Processor Container
> + * is a non-leaf that has the 'ACPI Processor ID valid' flag set.
> + */
> +void acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, cpumask_t *cpus)
> +{
> +	struct acpi_table_header *table_hdr;
> +	struct acpi_subtable_header *entry;
> +	unsigned long table_end;
> +	u32 proc_sz;
> +
> +	cpumask_clear(cpus);
> +
> +	table_hdr = acpi_get_pptt();
> +	if (!table_hdr)
> +		return;
> +
> +	table_end = (unsigned long)table_hdr + table_hdr->length;
> +	entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr,
> +			     sizeof(struct acpi_table_pptt));
> +	proc_sz = sizeof(struct acpi_pptt_processor);
> +	while ((unsigned long)entry + proc_sz <= table_end) {
> +		if (entry->type == ACPI_PPTT_TYPE_PROCESSOR) {
> +			struct acpi_pptt_processor *cpu_node;
> +
> +			cpu_node = (struct acpi_pptt_processor *)entry;
> +			if (cpu_node->flags & ACPI_PPTT_ACPI_PROCESSOR_ID_VALID &&
> +			    !acpi_pptt_leaf_node(table_hdr, cpu_node) &&
> +			    cpu_node->acpi_processor_id == acpi_cpu_id) {
> +				acpi_pptt_get_child_cpus(table_hdr, cpu_node, cpus);
> +				break;
> +			}
> +		}
> +		entry = ACPI_ADD_PTR(struct acpi_subtable_header, entry,
> +				     entry->length);
> +	}
> +}
> diff --git a/include/linux/acpi.h b/include/linux/acpi.h
> index 5ff5d99f6ead..4752ebd48132 100644
> --- a/include/linux/acpi.h
> +++ b/include/linux/acpi.h
> @@ -1541,6 +1541,7 @@ int find_acpi_cpu_topology(unsigned int cpu, int level);
>   int find_acpi_cpu_topology_cluster(unsigned int cpu);
>   int find_acpi_cpu_topology_package(unsigned int cpu);
>   int find_acpi_cpu_topology_hetero_id(unsigned int cpu);
> +void acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, cpumask_t *cpus);
>   #else
>   static inline int acpi_pptt_cpu_is_thread(unsigned int cpu)
>   {
> @@ -1562,6 +1563,8 @@ static inline int find_acpi_cpu_topology_hetero_id(unsigned int cpu)
>   {
>   	return -EINVAL;
>   }
> +static inline void acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id,
> +						     cpumask_t *cpus) { }
>   #endif
>   
>   void acpi_arch_init(void);

Thanks,
Gavin


  parent reply	other threads:[~2025-11-19  3:35 UTC|newest]

Thread overview: 83+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-17 16:59 [PATCH v5 00/34] arm_mpam: Add basic mpam driver Ben Horgan
2025-11-17 16:59 ` [PATCH v5 01/34] ACPI / PPTT: Add a helper to fill a cpumask from a processor container Ben Horgan
2025-11-18  8:37   ` Hanjun Guo
2025-11-19  3:35   ` Gavin Shan [this message]
2025-11-19 10:00     ` Ben Horgan
2025-11-19 16:22   ` Jeremy Linton
2025-11-17 16:59 ` [PATCH v5 02/34] ACPI / PPTT: Stop acpi_count_levels() expecting callers to clear levels Ben Horgan
2025-11-19  4:50   ` Hanjun Guo
2025-11-19 16:25   ` Jeremy Linton
2025-11-17 16:59 ` [PATCH v5 03/34] ACPI / PPTT: Add acpi_pptt_cache_v1_full to use pptt cache as one structure Ben Horgan
2025-11-18  4:03   ` Fenghua Yu
2025-11-18 10:57     ` Ben Horgan
2025-11-18 16:30       ` Fenghua Yu
2025-11-18 14:40   ` Jonathan Cameron
2025-11-19  3:44   ` Gavin Shan
2025-11-19  5:13   ` Hanjun Guo
2025-11-19 16:28   ` Jeremy Linton
2025-11-17 16:59 ` [PATCH v5 04/34] ACPI / PPTT: Find cache level by cache-id Ben Horgan
2025-11-18 15:32   ` Jonathan Cameron
2025-11-19 16:29   ` Jeremy Linton
2025-11-17 16:59 ` [PATCH v5 05/34] ACPI / PPTT: Add a helper to fill a cpumask from a cache_id Ben Horgan
2025-11-18 15:33   ` Jonathan Cameron
2025-11-19 16:37   ` Jeremy Linton
2025-11-17 16:59 ` [PATCH v5 06/34] arm64: kconfig: Add Kconfig entry for MPAM Ben Horgan
2025-11-17 16:59 ` [PATCH v5 07/34] platform: Define platform_device_put cleanup handler Ben Horgan
2025-11-17 16:59 ` [PATCH v5 08/34] ACPI: Define acpi_put_table cleanup handler and acpi_get_table_ret() helper Ben Horgan
2025-11-17 19:46   ` Rafael J. Wysocki
2025-11-18 11:07     ` Ben Horgan
2025-11-18 16:13     ` Catalin Marinas
2025-11-18 16:21       ` Rafael J. Wysocki
2025-11-18 16:45         ` Catalin Marinas
2025-11-17 16:59 ` [PATCH v5 09/34] ACPI / MPAM: Parse the MPAM table Ben Horgan
2025-11-18  3:31   ` Fenghua Yu
2025-11-17 16:59 ` [PATCH v5 10/34] arm_mpam: Add probe/remove for mpam msc driver and kbuild boiler plate Ben Horgan
2025-11-17 19:50   ` Markus Elfring
2025-11-18 10:44     ` Ben Horgan
2025-11-18 11:28       ` [v5 " Markus Elfring
2025-11-18  5:19   ` [PATCH v5 " Shaopeng Tan (Fujitsu)
2025-11-17 16:59 ` [PATCH v5 11/34] arm_mpam: Add the class and component structures for firmware described ris Ben Horgan
2025-11-18  4:11   ` Fenghua Yu
2025-11-17 16:59 ` [PATCH v5 12/34] arm_mpam: Add MPAM MSC register layout definitions Ben Horgan
2025-11-17 16:59 ` [PATCH v5 13/34] arm_mpam: Add cpuhp callbacks to probe MSC hardware Ben Horgan
2025-11-17 16:59 ` [PATCH v5 14/34] arm_mpam: Probe hardware to find the supported partid/pmg values Ben Horgan
2025-11-18 16:23   ` Fenghua Yu
2025-11-17 16:59 ` [PATCH v5 15/34] arm_mpam: Add helpers for managing the locking around the mon_sel registers Ben Horgan
2025-11-19  4:13   ` Fenghua Yu
2025-11-19 10:12     ` Ben Horgan
2025-11-17 16:59 ` [PATCH v5 16/34] arm_mpam: Probe the hardware features resctrl supports Ben Horgan
2025-11-17 16:59 ` [PATCH v5 17/34] arm_mpam: Merge supported features during mpam_enable() into mpam_class Ben Horgan
2025-11-17 16:59 ` [PATCH v5 18/34] arm_mpam: Reset MSC controls from cpuhp callbacks Ben Horgan
2025-11-17 16:59 ` [PATCH v5 19/34] arm_mpam: Add a helper to touch an MSC from any CPU Ben Horgan
2025-11-17 16:59 ` [PATCH v5 20/34] arm_mpam: Extend reset logic to allow devices to be reset any time Ben Horgan
2025-11-17 17:00 ` [PATCH v5 21/34] arm_mpam: Register and enable IRQs Ben Horgan
2025-11-18  5:30   ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 22/34] arm_mpam: Use a static key to indicate when mpam is enabled Ben Horgan
2025-11-17 17:00 ` [PATCH v5 23/34] arm_mpam: Allow configuration to be applied and restored during cpu online Ben Horgan
2025-11-18  5:21   ` Shaopeng Tan (Fujitsu)
2025-11-18 15:39   ` Jonathan Cameron
2025-11-19  4:53   ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 24/34] arm_mpam: Probe and reset the rest of the features Ben Horgan
2025-11-18 16:54   ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 25/34] arm_mpam: Add helpers to allocate monitors Ben Horgan
2025-11-18 20:44   ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 26/34] arm_mpam: Add mpam_msmon_read() to read monitor value Ben Horgan
2025-11-19  5:03   ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 27/34] arm_mpam: Track bandwidth counter state for power management Ben Horgan
2025-11-19  4:43   ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 28/34] arm_mpam: Consider overflow in bandwidth counter state Ben Horgan
2025-11-19  4:27   ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 29/34] arm_mpam: Probe for long/lwd mbwu counters Ben Horgan
2025-11-19  4:57   ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 30/34] arm_mpam: Use long MBWU counters if supported Ben Horgan
2025-11-17 17:00 ` [PATCH v5 31/34] arm_mpam: Add helper to reset saved mbwu state Ben Horgan
2025-11-17 17:00 ` [PATCH v5 32/34] arm_mpam: Add kunit test for bitmap reset Ben Horgan
2025-11-17 17:00 ` [PATCH v5 33/34] arm_mpam: Add kunit tests for props_mismatch() Ben Horgan
2025-11-17 17:00 ` [PATCH v5 34/34] MAINTAINERS: new entry for MPAM Driver Ben Horgan
2025-11-17 20:02   ` Catalin Marinas
2025-11-17 22:08     ` Reinette Chatre
2025-11-18 15:41   ` Jonathan Cameron
2025-11-19  4:06   ` Gavin Shan
2025-11-18  3:29 ` [PATCH v5 00/34] arm_mpam: Add basic mpam driver Fenghua Yu
2025-11-18  6:54 ` Shaopeng Tan (Fujitsu)
2025-11-18  7:45 ` Hanjun Guo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=455c577a-2c6b-4d57-9547-8f55bfe1c126@redhat.com \
    --to=gshan@redhat.com \
    --cc=amitsinght@marvell.com \
    --cc=baisheng.gao@unisoc.com \
    --cc=baolin.wang@linux.alibaba.com \
    --cc=ben.horgan@arm.com \
    --cc=bobo.shaobowang@huawei.com \
    --cc=carl@os.amperecomputing.com \
    --cc=catalin.marinas@arm.com \
    --cc=dakr@kernel.org \
    --cc=dave.martin@arm.com \
    --cc=david@redhat.com \
    --cc=dfustini@baylibre.com \
    --cc=fenghuay@nvidia.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=guohanjun@huawei.com \
    --cc=james.morse@arm.com \
    --cc=jeremy.linton@arm.com \
    --cc=jonathan.cameron@huawei.com \
    --cc=kobak@nvidia.com \
    --cc=lcherian@marvell.com \
    --cc=lenb@kernel.org \
    --cc=linux-acpi@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=peternewman@google.com \
    --cc=quic_jiles@quicinc.com \
    --cc=rafael@kernel.org \
    --cc=robh@kernel.org \
    --cc=rohit.mathew@arm.com \
    --cc=scott@os.amperecomputing.com \
    --cc=sdonthineni@nvidia.com \
    --cc=sudeep.holla@arm.com \
    --cc=tan.shaopeng@fujitsu.com \
    --cc=tan.shaopeng@jp.fujitsu.com \
    --cc=will@kernel.org \
    --cc=xhao@linux.alibaba.com \
    --cc=zengheng4@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®