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From: John Garry <john.garry@huawei.com>
To: Zhen Lei <thunder.leizhen@huawei.com>,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will.deacon@arm.com>, Joerg Roedel <joro@8bytes.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	iommu <iommu@lists.linux-foundation.org>,
	linux-kernel <linux-kernel@vger.kernel.org>
Cc: LinuxArm <linuxarm@huawei.com>
Subject: Re: [PATCH 1/1] iommu/arm-smmu-v3: eliminate a potential memory corruption on Hi16xx soc
Date: Mon, 15 Oct 2018 12:17:51 +0100	[thread overview]
Message-ID: <4583617a-49ad-00b5-97fc-1ea35568c5cd@huawei.com> (raw)
In-Reply-To: <1539592576-24352-1-git-send-email-thunder.leizhen@huawei.com>

On 15/10/2018 09:36, Zhen Lei wrote:
> ITS translation register map:
> 0x0000-0x003C	Reserved
> 0x0040		GITS_TRANSLATER
> 0x0044-0xFFFC	Reserved
>

Can you add a better opening than the ITS translation register map?

> The standard GITS_TRANSLATER register in ITS is only 4 bytes, but Hisilicon
> expands the next 4 bytes to carry some IMPDEF information. That means, 8 bytes
> data will be written to MSIAddress each time.
>
> MSIAddr: |----4bytes----|----4bytes----|
> 	 |    MSIData   |    IMPDEF    |
>
> There is no problem for ITS, because the next 4 bytes space is reserved in ITS.
> But it will overwrite the 4 bytes memory following "sync_count". It's very

I think arm_smmu_device.sync_count is better, or "sync_count member in 
the the smmu driver control struct".

> luckly that the previous and the next neighbour of "sync_count" are both aligned

/s/luckly/luckily or fortunately/

> by 8 bytes, so no problem is met now.
>
> It's good to explicitly add a workaround:
> 1. Add gcc __attribute__((aligned(8))) to make sure that "sync_count" is always
>    aligned by 8 bytes.
> 2. Add a "u64" union member to make sure the 4 bytes padding is always exist.
>
> There is no functional change.
>
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
>  drivers/iommu/arm-smmu-v3.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index 5059d09..a07bc0d 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -586,7 +586,10 @@ struct arm_smmu_device {
>
>  	struct arm_smmu_strtab_cfg	strtab_cfg;
>
> +	union {
> +	u64				padding; /* workaround for Hisilicon */

I think that a more detailed comment is required.

>  	u32				sync_count;

Can you indent these 2 members? However - as discussed internally - this 
may have endian issue so better to declare full 64b struct.

> +	} __attribute__((aligned(8)));
>
>  	/* IOMMU core code handle */
>  	struct iommu_device		iommu;
>
Thanks




  reply	other threads:[~2018-10-15 11:18 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-15  8:36 Zhen Lei
2018-10-15 11:17 ` John Garry [this message]
2018-10-16  9:19   ` Leizhen (ThunderTown)
2018-10-15 12:46 ` Andrew Murray
2018-10-16 10:02   ` Leizhen (ThunderTown)
2018-10-15 13:52 ` Robin Murphy
2018-10-16  9:27   ` Leizhen (ThunderTown)
2018-10-15 17:21 ` Will Deacon
2018-10-15 17:36   ` Robin Murphy
2018-10-16 10:08     ` Will Deacon
2018-10-16  9:41   ` Leizhen (ThunderTown)

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