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[84.10.100.139]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2f16a9ded09sm2451181fa.109.2024.08.03.06.24.07 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 03 Aug 2024 06:24:11 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 (Mac OS X Mail 14.0 \(3654.120.0.1.15\)) Subject: Re: [PATCH v2 0/3] Add initial support for the Rockchip RK3588 HDMI TX Controller From: Piotr Oniszczuk In-Reply-To: <20240801-b4-rk3588-bridge-upstream-v2-0-9fa657a4e15b@collabora.com> Date: Sat, 3 Aug 2024 15:24:06 +0200 Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Sandy Huang , =?utf-8?Q?Heiko_St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Yao , Sascha Hauer , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "open list:ARM/Rockchip SoC..." , devicetree@vger.kernel.org, kernel@collabora.com, Alexandre ARNOUD , Luis de Arquer , Algea Cao Content-Transfer-Encoding: quoted-printable Message-Id: <45B07EAF-4CBA-4DE4-A03B-109767D52B29@gmail.com> References: <20240801-b4-rk3588-bridge-upstream-v2-0-9fa657a4e15b@collabora.com> To: Cristian Ciocaltea X-Mailer: Apple Mail (2.3654.120.0.1.15) Hi Cristian, Will you find some time and motivation to add CEC support to Quad-Pixel = (QP) TX controller ? Probably you recall - I added initial CEC support to yours v1 series and = i=E2=80=99m stuck with timing issue (cec pulses are 3x too long). For me it looks like clock issue. I=E2=80=99m out of ideas how to move forward with this timming issue=E2=80= =A6. =20 > Wiadomo=C5=9B=C4=87 napisana przez Cristian Ciocaltea = w dniu 01.08.2024, o godz. 04:25: >=20 > The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI > 2.1 Quad-Pixel (QP) TX controller [4], which is a new IP block, quite > different from those used in the previous generations of Rockchip = SoCs. >=20 > This is the last component that needs to be supported in order to = enable > the HDMI output functionality on the RK3588 based SBCs, such as the > RADXA Rock 5B. The other components are the Video Output Processor > (VOP2) and the Samsung IP based HDMI/eDP TX Combo PHY, for which basic > support has been already made available via [1] and [2], respectively. >=20 > Please note this is a reworked version of the original series, which > relied on a commonized dw-hdmi approach. Since the general consensus > was to handle it as an entirely new IP, I dropped all patches related = to > the old dw-hdmi and Rockchip glue code - a few of them might still = make > sense as general improvements and will be submitted separately. >=20 > Additionally, as suggested by Neil, I've sent the reworked bridge = driver > as a separate patchset [4], hence this series handles now just the new > Rockchip QP platform driver. >=20 > It's worth mentioning the HDMI output support is currently limited to > RGB output up to 4K@60Hz, without audio, CEC or any of the HDMI 2.1 > specific features. Moreover, the VOP2 driver is not able to properly > handle all display modes supported by the connected screens, e.g. it > doesn't cope with non-integer refresh rates. >=20 > A possible workaround consists of enabling the display controller to > make use of the clock provided by the HDMI PHY PLL. This is still work > in progress and will be submitted later, as well as the required DTS > updates. >=20 > To facilitate testing and experimentation, all HDMI output related > patches, including those part of this series, as well as the bridge > driver, are available at [3]. >=20 > So far I could only verify this on the RADXA Rock 5B board. >=20 > Thanks, > Cristian >=20 > [1]: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588") > [2]: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY = driver") > [3]: = https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux/-/com= mits/rk3588-hdmi-bridge-v6.11-rc1 > [4]: = https://lore.kernel.org/lkml/20240801-dw-hdmi-qp-tx-v1-0-148f542de5fd@coll= abora.com/ >=20 > Signed-off-by: Cristian Ciocaltea > --- > Changes in v2: > - Reworked the glue code for RK3588 into a new Rockchip platform = driver > - Moved bridge driver patches to a separate series [4] > - Dropped all the patches touching to the old dw-hdmi and RK platform > drivers > - Added connector creation to ensure the HDMI QP bridge driver does = only > support DRM_BRIDGE_ATTACH_NO_CONNECTOR > - Link to v1: = https://lore.kernel.org/r/20240601-b4-rk3588-bridge-upstream-v1-0-f6203753= 232b@collabora.com >=20 > --- > Cristian Ciocaltea (3): > dt-bindings: display: rockchip: Add schema for RK3588 HDMI TX = Controller > drm/rockchip: Explicitly include bits header > drm/rockchip: Add basic RK3588 HDMI output support >=20 > .../display/rockchip/rockchip,dw-hdmi-qp.yaml | 188 +++++++++ > drivers/gpu/drm/rockchip/Kconfig | 8 + > drivers/gpu/drm/rockchip/Makefile | 1 + > drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 430 = +++++++++++++++++++++ > drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 2 + > drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 4 +- > 6 files changed, 632 insertions(+), 1 deletion(-) > --- > base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 > change-id: 20240601-b4-rk3588-bridge-upstream-a27baff1b8fc >=20 >=20 > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip