From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.mindbit.ro (xs1.mindbit.ro [80.86.107.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 090E636A03F for ; Tue, 21 Jul 2026 00:59:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.86.107.70 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784595545; cv=none; b=VLCmkYPeKtTSj9OSB64iFmfjFho4I+6d4S0RdcehTLIaOdosMYIIvcBQRH6EFwdECs2tnZGjELNnvjYpKwXzcNhYkfB7V0cCfMtSnRlVFqmPS6w86BOCgjt35dPMTAgjMCIrwfRmm81sKl/VTtdBbWjMRRAabBAz832MfziVquI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784595545; c=relaxed/simple; bh=6wYaMjfytSD+3DvD45BhntXR0HL+PDBSinvVmzQtDH0=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:MIME-Version; b=LcYE5Fwul5Wq37iKLBocpwNusPncE2bC64eiB7k34xbjas13k0bPJx3pW7CFyTzXjBshlV0iM/qkE7zWk3XZVDiePig+C9Gbtn9q3raOiYEryz9DjSzjdSxQha1I8Fl/vwdx2ArJVZaJBqbvhs7NQNUNTZHWNC7IaspfJ6nStBQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=rendec.net; spf=pass smtp.mailfrom=rendec.net; dkim=pass (2048-bit key) header.d=rendec.net header.i=@rendec.net header.b=NoZc5GUY; arc=none smtp.client-ip=80.86.107.70 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=rendec.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rendec.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rendec.net header.i=@rendec.net header.b="NoZc5GUY" Received: from dog.kanata.rendec.net (pool-174-112-193-187.cpe.net.cable.rogers.com [174.112.193.187]) by mail.mindbit.ro (Postfix) with ESMTPSA id ED15DC3739; Tue, 21 Jul 2026 03:58:53 +0300 (EEST) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.mindbit.ro ED15DC3739 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rendec.net; s=default; t=1784595535; bh=ozfN1zf4+uWXwlf8HnytJ7+svEtCavVMiyprjP6zfIY=; h=Subject:From:To:Cc:Date:In-Reply-To:References:From; b=NoZc5GUYWpGTXpXx+efET/sRKMKjc3hZyNX08PYoRhuPmmObvDVItLVooNLlnZWUA ef63ouqcQT9LpvXVPwwu+RWK7TFGSBq0KKq677FTsv2sHgzevYrNvcOFGpAjvkp9bg AZAdODboxQm8XKy9nFmJy4jgBGOrIenINS6A0J+++K5yOlCogCynWH2S9m224AnJul yZtjfB1l8an2Dawlt8DkJyPBl5cL8IiKEkCcVtTgXGrNOufWzjUY1MRyW/OOB4UXaa q4rN+Bn4HAn53NrW4uPi3XADB53Ji9G0Wneoci6Vryq0Dd+cfCxjGw0QXBUc4r6VZq s8CyHcl7Zlezg== Message-ID: <46025d0b3255bd62412598eedae4eda03a61cd39.camel@rendec.net> Subject: Re: [PATCH v5 4/4] irqchip/gic-v3-its: Fix grammar and replace a bit number with its symbol From: Radu Rendec To: Kemeng Shi , maz@kernel.org, tglx@kernel.org, jason@lakedaemon.net, lpieralisi@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Mon, 20 Jul 2026 20:58:52 -0400 In-Reply-To: <20260720071215.50705-5-shikemeng@huaweicloud.com> References: <20260720071215.50705-1-shikemeng@huaweicloud.com> <20260720071215.50705-5-shikemeng@huaweicloud.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.3 (3.58.3-1.fc43) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Mon, 2026-07-20 at 15:12 +0800, Kemeng Shi wrote: > Fix grammatical errors in comments and simplify the comment about reading > GITS_BASER_INDIRECT to check two-level support. >=20 > Signed-off-by: Kemeng Shi > --- > =C2=A0drivers/irqchip/irq-gic-v3-its.c | 5 ++--- > =C2=A01 file changed, 2 insertions(+), 3 deletions(-) >=20 > diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v= 3-its.c > index 5dc91862fc15..8935a6e7a20f 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -163,7 +163,7 @@ struct event_lpi_map { > =C2=A0 > =C2=A0/* > =C2=A0 * The ITS view of a device - belongs to an ITS, owns an interrupt > - * translation table, and a list of interrupts.=C2=A0 If it some of its > + * translation table, and a list of interrupts.=C2=A0 If some of its > =C2=A0 * LPIs are injected into a guest (GICv4), the event_map.vm field > =C2=A0 * indicates which one. > =C2=A0 */ > @@ -2502,8 +2502,7 @@ static bool its_parse_indirect_baser(struct its_nod= e *its, > =C2=A0 /* No need to enable Indirection if memory requirement < (psz*2)by= tes */ > =C2=A0 if ((esz << ids) > (psz * 2)) { > =C2=A0 /* > - * Find out whether hw supports a single or two-level table by > - * table by reading bit at offset '62' after writing '1' to it. > + * Find out whether hw supports a single or two-level table > =C2=A0 */ nit: since it's just one line of text now, you can put the /* */ comment markers on the same line, which is the preferred style for single-line comments. > =C2=A0 its_write_baser(its, baser, val | GITS_BASER_INDIRECT); > =C2=A0 indirect =3D !!(baser->val & GITS_BASER_INDIRECT); With that, Reviewed-by: Radu Rendec