From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6618A2737E0; Mon, 19 Jan 2026 10:10:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768817425; cv=none; b=N/uevFANEW9U0FeST0BhbGFQsjuaEcpBlqfXOiCuH7hZIytnBXHjNUGPNoeowq9R4XiHfcGrynKGBaLlWDSju5+FiPzo8r8GbE1kEQ6TEPBPYOyuZpkRL+dw2lgRg865p+dXIvczWfphYy8fFoyL33u2bHgFDaUMU/HmpFIFwe4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768817425; c=relaxed/simple; bh=Qay2toySjvtV5YKvWvOb020wKuZNfIJZypshhGGJ0x8=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=dWTXsh1vgmiSvC4sp6YNyPPj/djpyFcNS28aP3BQOr3oSCBpXO96VjbY9JiuQl9xoJGX86AOQU/5JuhsX8EidghonOjmZtsf0smh2ZqdeVIcVwJ2KXFquP6dmHyVR/acfrpaG94+zDdBdTE4SDXC1+oV4SP+wC9eEC28DDya/8M= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=jDKaO7nK; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="jDKaO7nK" Received: from [192.168.88.20] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 1A16E2D9; Mon, 19 Jan 2026 11:09:50 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1768817391; bh=Qay2toySjvtV5YKvWvOb020wKuZNfIJZypshhGGJ0x8=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=jDKaO7nK3PHUWQqG8/nhkP4IsvS0dxmpZtYDrn7MSzvEH5fDqQNp3UYKrtd/cS8cz Q+LHiMTjyobK54ehc1aZI73CegBHLdDivvNVuU6MbYlkyLbS515lmrE7VZbau+TueK Xh0vc3xWkQEvPuLLn+IRx5bZmvo2wnDdB031qGoM= Message-ID: <462b3b7a-c228-456a-84bf-0e6103be61b7@ideasonboard.com> Date: Mon, 19 Jan 2026 12:10:17 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/3] dt-bindings: display: ti,am65x-dss: Add am62p dss compatible To: Swamil Jain , jyri.sarha@iki.fi, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, aradhya.bhatia@linux.dev, mwalle@kernel.org Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, devarsht@ti.com, praneeth@ti.com, u-kumar1@ti.com, Nishanth Menon References: <20260116095406.2544565-1-s-jain1@ti.com> <20260116095406.2544565-2-s-jain1@ti.com> From: Tomi Valkeinen Content-Language: en-US Autocrypt: addr=tomi.valkeinen@ideasonboard.com; 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charset=UTF-8 Content-Transfer-Encoding: 7bit Hi, On 16/01/2026 11:54, Swamil Jain wrote: > TI's AM62P SoC contains two instances of the TI Keystone Display > SubSystem (DSS), each with two video ports and two video planes. These > instances support up to three independent video streams through OLDI, > DPI, and DSI interfaces. The OLDI interfaces utilizes two OLDI > transmitters OLDI0 and OLDI1. > > DSS0 (first instance) supports: > - With respect to OLDI Tx interfaces, DSS0 instance can either drive > both OLDI0 Tx and OLDI1 Tx together (e.g. dual link mode or clone > mode) or can only drive OLDI0 Tx in single link mode with OLDI1 being > utilized by DSS1 or left unused. > - DPI output from video port 2. > > DSS1 (second instance) supports: > - With respect to OLDI Tx interfaces, DSS1 instance can only drive > OLDI1 Tx given DSS0 is not utilizing that as described above. > - DSI controller output from video port 2. > > The two OLDI transmitters can be configured in clone mode to drive a > pair of identical OLDI single-link displays. DPI outputs from > DSS0 VP2, DSS1 VP1, and DSS1 VP2 are multiplexed, allowing only one > DPI output at a time. > > Add the compatible string "ti,am62p-dss" and update related > description accordingly. > > AM62P has different power domains for DSS and OLDI compared to other > Keystone SoCs. DSS0 can have up to 3 power-domains for DSS0, OLDI0 and > OLDI1, and DSS1 can have up to 2 power-domains for DSS1 and OLDI1. > > Signed-off-by: Swamil Jain > --- > .../bindings/display/ti/ti,am65x-dss.yaml | 37 ++++++++++++++++++- > 1 file changed, 35 insertions(+), 2 deletions(-) I think we have a bad design issue here, and I don't know how to fix it. The OLDIs have been a bit difficult to model, as they are not full devices: they are not on a control bus, and don't have registers, yet they need configuration. Part of the config is done via separate IO controls with syscon, part of the config is done via DSS's registers. It's not documented, but I assume the OLDI registers in the DSS IP are wired somewhat directly to the OLDI IP. So currently we just consider OLDIs to be part of the DSS. We do model them as separate custom DSS child nodes in the DT, so that we can model the pipelines correctly. For example, to support dual-link OLDI, we have two OLDI TX nodes, which get their pixel stream from a single DSS port. The power-domains for the OLDIs were just set as DSS power-domains, as OLDIs were part of DSS in this design. This felt perhaps slightly hacky, but it also made sense and allowed us to model the HW. Now, with AM62P, it gets a bit interesting. We have two independent DSS IPs, each of which have two output ports, and we have two OLDI TX instances. The OLDI TX instances are shared between the DSS instances, and the first output port on both DSS can be muxed to an OLDI. The first DSS can be connected to both OLDI TXes, the second DSS can be connected only to the second OLDI. This DSS application note has a bit more info and some pics: https://www.ti.com/lit/pdf/sprads3 Now, both DSS instances have identical registers for configuring both OLDI instances. This is not documented, but I'm guessing that when configuring the clock muxes (the clock tree is also "interesting"), it will also mux the configuration wires coming from the DSS instances. So when you change the parent clocks for DSS & OLDI to be the right ones to use, say, OLDI TX1 on DSS1, you also change where the OLDI configuration is coming from. So the OLDIs are now shared, and the configuration registers are duplicated and routed based on clock setup (afaiu). Clearly the OLDIs can not be considered being part of DSS0 or DSS1 anymore, nor can we set the OLDI power-domains in the DSS node. What this series does is that it adds three OLDI nodes, two for DSS0 (as DSS0 can use either one or two OLDIs) and one for DSS1. And then, depending on which OLDIs you happen to use, you're supposed to set the DSS power-domains accordingly, so that the DSS being used for OLDI has the necessary OLDI power-domains. And connect the media graph so that if your panel uses OLDI TX1 with the DSS0, you connect to that OLDI DT node, but if you use the same OLDI TX1 with the DSS1, you connect to another OLDI DT node. I don't think that's right at all... I don't right away have a good idea (well, not even a bad idea) how this should be designed. Tomi