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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-60566c2a7bcsm2304464a12.12.2025.05.30.16.00.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 May 2025 16:00:42 -0700 (PDT) Message-ID: <4639636e-0544-44a4-a997-2969f4661bd0@oss.qualcomm.com> Date: Sat, 31 May 2025 01:00:39 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 06/18] clk: qcom: common: Add support to configure clk regs in qcom_cc_really_probe To: Jagadeesh Kona , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Vladimir Zapolskiy , Dmitry Baryshkov Cc: Ajit Pandey , Imran Shaik , Taniya Das , Satya Priya Kakitapalli , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Bryan O'Donoghue , Dmitry Baryshkov References: <20250530-videocc-pll-multi-pd-voting-v5-0-02303b3a582d@quicinc.com> <20250530-videocc-pll-multi-pd-voting-v5-6-02303b3a582d@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250530-videocc-pll-multi-pd-voting-v5-6-02303b3a582d@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: U4ubrL0UMr4GCAsflSLY-zkkcFsNHlOE X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTMwMDIwNiBTYWx0ZWRfX5wkVYkZBJM15 ju/nBhN0Vwdw504H/W3P6JTaf9T9I/658wQX3tqgqcXh40HgIvmtEEC1WzA0CmLGn/JQzJDyIPD uS682nJzEnMDJIMM20TsWZiAlLCBadCUu2eEtSHKIayftbfHr45OzkAn8SWYpmHwjYXvvQKyc5I O4gQdVSkoQc38fIGesq21pqxM8ERvi9utkp1l3jIDdT0xmrhtU0w+GsWURedGZsfKJxcEHkTYzd fkdoipOjz52EXvG0SZ2zydEAK7mupsj1RDsWvkv6Rc2MbdlSCZIk5NvWAfwQ1JKb/4NXUhwLNfh 1oqdZcfROzf68pXZ47AnKZzhkshZujimpB1jeN0GCqZ8xtG9c5F2RdMrq9QUPGfrZPETvz9Q2J/ Xy8+j9iudKKSn9DWg3epHMTrcoD0AQP843AZEWHLEVSbEWfPGRIG9XRDFY9Z7uafU8FsYHFq X-Authority-Analysis: v=2.4 cv=fMk53Yae c=1 sm=1 tr=0 ts=683a389d cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=zrwMVDrAeVkrMBg2wiAA:9 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 a=cvBusfyB2V15izCimMoJ:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: U4ubrL0UMr4GCAsflSLY-zkkcFsNHlOE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-30_10,2025-05-30_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 impostorscore=0 phishscore=0 suspectscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505160000 definitions=main-2505300206 On 5/30/25 3:20 PM, Jagadeesh Kona wrote: > Add support to configure PLLS and clk registers in qcom_cc_really_probe(). > This ensures all required power domains are enabled and kept ON by runtime > PM code in qcom_cc_really_probe() before configuring the PLLS or clock > registers. > > Add support for qcom_cc_driver_data struct to maintain the clock > controllers PLLs and CBCRs data, and a pointer of it can be stored in > clock descriptor structure. If any clock controller driver requires to > program some additional misc register settings, it can register the > clk_regs_configure() callback in the driver data. > > Reviewed-by: Bryan O'Donoghue > Reviewed-by: Dmitry Baryshkov > Signed-off-by: Jagadeesh Kona > --- Reviewed-by: Konrad Dybcio Konrad