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This is the preferred method for examining RMP entries. > > The instruction is advertised in CPUID 0x8000001f_EAX[21]. Use this > instruction when available. > > Signed-off-by: Tom Lendacky Reviewed-by: Nikunj A Dadhania > --- > arch/x86/include/asm/cpufeatures.h | 1 + > arch/x86/virt/svm/sev.c | 11 +++++++++++ > 2 files changed, 12 insertions(+) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index dd4682857c12..93620a4c5b15 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -447,6 +447,7 @@ > #define X86_FEATURE_V_TSC_AUX (19*32+ 9) /* Virtual TSC_AUX */ > #define X86_FEATURE_SME_COHERENT (19*32+10) /* AMD hardware-enforced cache coherency */ > #define X86_FEATURE_DEBUG_SWAP (19*32+14) /* "debug_swap" AMD SEV-ES full debug state swap support */ > +#define X86_FEATURE_RMPREAD (19*32+21) /* RMPREAD instruction */ > #define X86_FEATURE_SVSM (19*32+28) /* "svsm" SVSM present */ > > /* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */ > diff --git a/arch/x86/virt/svm/sev.c b/arch/x86/virt/svm/sev.c > index 103a2dd6e81d..73d4f422829a 100644 > --- a/arch/x86/virt/svm/sev.c > +++ b/arch/x86/virt/svm/sev.c > @@ -301,6 +301,17 @@ static int get_rmpentry(u64 pfn, struct rmpentry *entry) > { > struct rmpentry_raw *e; > > + if (cpu_feature_enabled(X86_FEATURE_RMPREAD)) { > + int ret; > + > + asm volatile(".byte 0xf2, 0x0f, 0x01, 0xfd" > + : "=a" (ret) > + : "a" (pfn << PAGE_SHIFT), "c" (entry) > + : "memory", "cc"); > + > + return ret; > + } > + > e = __get_rmpentry(pfn); > if (IS_ERR(e)) > return PTR_ERR(e);