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(p200300ea8f2cd4009135d56ec3ceedd3.dip0.t-ipconnect.de. [2003:ea:8f2c:d400:9135:d56e:c3ce:edd3]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-486eb2ecf23sm620428f8f.5.2026.09.10.12.33.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 10 Sep 2026 12:33:18 -0700 (PDT) Message-ID: <46807790-6f07-4f0a-b50b-375cc1c9b061@gmail.com> Date: Thu, 10 Sep 2026 21:33:15 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH net v2] r8169: don't enable chip LTR when the platform has not enabled LTR To: Yogesh Gaur , nic_swsd@realtek.com Cc: Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Javen Xu References: <20260910130140.910-1-yogeshgaur.83@gmail.com> Content-Language: en-US From: Heiner Kallweit In-Reply-To: <20260910130140.910-1-yogeshgaur.83@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10.09.2026 15:01, Yogesh Gaur wrote: > rtl_enable_ltr() programs the MAC to generate LTR messages - ALDPS_LTR_EN, > Empty lines, mail formatting issue? > LTR_SNOOP_EN, LTR_OBFF_LOCK_EN, plus LINK_SPEED_CHANGE_EN on > > RTL8125/RTL8126/RTL8127 - and rtl_hw_aspm_clkreq_enable() calls it on > > every ASPM enable, then goes on to let the chip trigger L1.2. > > > > The only gate is tp->aspm_manageable, which records that the OS is allowed > > to control ASPM. It says nothing about LTR. LTR is a separate PCIe > > capability that only works if every device on the path to the root port > > supports it. The PCI core works that out in pci_configure_ltr() and > > records the result in pci_dev->ltr_path; per PCIe r6.0 sec 7.5.3.16 a > > function must not issue LTR messages while LTR Mechanism Enable is clear. > > > > So on a platform whose hierarchy has no LTR path, the driver tells the > > chip to start sending LTR messages nothing will honour, and ties ALDPS - > > the PHY's link-down power saving - to them. A report against RTL8125B > > (rev 05, firmware rtl8125b-2_0.0.2) in a mini PC shows the effect: 291 Did you verify that this is caused by LTR messages, and not by any other root cause? > > link down/up transitions in one eight-hour boot, with repeated downshifts > > to 100Mbps, against four transitions at boot and then a stable link on > > the kernel before the LTR change. > > > > Gate the chip's LTR programming on pci_dev->ltr_path. That field lives > > inside CONFIG_PCIEASPM, and without ASPM support there is nothing here to > > enable LTR for, so compile the function out in that configuration. > > > > Note this does change CONFIG_PCIEASPM=n builds, which used to program > > chip LTR unconditionally: pci_disable_link_state() is a stub that returns > > success there, so tp->aspm_manageable ends up set. The PCI core does not > > configure LTR in that configuration either. > > > > Fixes: 9ab94a32af70 ("r8169: enable LTR support") > > Closes: https://bugzilla.redhat.com/show_bug.cgi?id=2529752 Did you verify that your patch fixes the reported issue? Or do you just assume this? Because in the bug comment history I don't see a statement that issue has been resolved. > Assisted-by: LLM > > Signed-off-by: Yogesh Gaur > > --- > > v2: > > - Gate on pci_dev->ltr_path instead of reading PCI_EXP_DEVCTL2 directly, > > and compile rtl_enable_ltr() out for CONFIG_PCIEASPM=n, where that > > field does not exist and there is nothing to enable LTR for. > > Suggested by Heiner Kallweit. > > - Commit message notes the resulting change for CONFIG_PCIEASPM=n builds. > > - No change to the RTL8125 register programming itself. > > > > v1: https://lore.kernel.org/all/20260909110554.1977-1-yogeshgaur.83@gmail.com/ > > > > drivers/net/ethernet/realtek/r8169_main.c | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c > > index ec4fc21fa21f..05f7a44aff01 100644 > > --- a/drivers/net/ethernet/realtek/r8169_main.c > > +++ b/drivers/net/ethernet/realtek/r8169_main.c > > @@ -3035,8 +3035,16 @@ static void rtl_disable_exit_l1(struct rtl8169_private *tp) > > } > > } > > > > +#ifdef CONFIG_PCIEASPM > > static void rtl_enable_ltr(struct rtl8169_private *tp) > > { > > + /* The chip must not issue LTR messages unless LTR is enabled on the > > + * whole path up to the root port. pci_configure_ltr() works that out > > + * and records the result in pci_dev->ltr_path. > > + */ > > + if (!tp->pci_dev->ltr_path) Simpler would be: if (!IS_ENABLED(CONFIG_PCIEASPM) || !tp->pci_dev->ltr_path) Then you don't need the stub function. > > + return; > > + > > switch (tp->mac_version) { > > case RTL_GIGA_MAC_VER_80: > > r8168_mac_ocp_write(tp, 0xcdd0, 0x9003); > > @@ -3120,6 +3128,11 @@ static void rtl_enable_ltr(struct rtl8169_private *tp) > > /* chip can trigger LTR */ > > r8168_mac_ocp_modify(tp, LTR_OBFF_LOCK, 0x0003, LTR_OBFF_LOCK_EN); > > } > > +#else > > +static void rtl_enable_ltr(struct rtl8169_private *tp) > > +{ > > +} > > +#endif > > > > static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable) > > { >