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On 4/12/2025 5:13 AM, Konrad Dybcio wrote: > On 4/10/25 4:00 PM, Gaurav Kohli wrote: >> Add TSENS and thermal devicetree node for QCS615 SoC. >> >> Signed-off-by: Gaurav Kohli >> --- > > subject: "arm64: dts: qcom: qcs615: .."> arch/arm64/boot/dts/qcom/qcs615.dtsi | 281 +++++++++++++++++++++++++++ >> 1 file changed, 281 insertions(+) >> will fix this. >> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi >> index edfb796d8dd3..f0d8aed7da29 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi >> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi >> @@ -3668,6 +3668,17 @@ usb_2_dwc3: usb@a800000 { >> maximum-speed = "high-speed"; >> }; >> }; >> + >> + tsens0: tsens@c222000 { >> + compatible = "qcom,qcs615-tsens", "qcom,tsens-v2"; >> + reg = <0x0 0xc263000 0x0 0x1ff>, >> + <0x0 0xc222000 0x0 0x8>; > Pad the address part to 8 hex digits with leading zeroes> + interrupts = , > > &pdc 26 > >> + ; > > &pdc 28 we don't want to mark this as wake up capable, so using this approach. > > Please align the >> + #qcom,sensors = <16>; >> + interrupt-names = "uplow", "critical"; > > it would make sense for interrupt-names to come right under interrupts yes, will update in next patch set. >> + #thermal-sensor-cells = <1>; >> + }; >> }; >> >> arch_timer: timer { >> @@ -3677,4 +3688,274 @@ arch_timer: timer { >> , >> ; >> }; >> + >> + thermal-zones { >> + aoss-thermal { >> + thermal-sensors = <&tsens0 0>; >> + >> + trips { >> + >> + trip-point0 { >> + temperature = <110000>; >> + hysteresis = <5000>; >> + type = "passive"; >> + }; >> + }; >> + }; >> + >> + cpuss-0-thermal { >> + thermal-sensors = <&tsens0 1>; >> + >> + trips { >> + >> + trip-point0 { >> + temperature = <115000>; >> + hysteresis = <5000>; >> + type = "passive"; >> + }; >> + >> + trip-point1 { >> + temperature = <118000>; >> + hysteresis = <5000>; >> + type = "passive"; >> + }; > > Please drop the passive trip point for the *CPU* tzones, see > we are using trip-point 0 for cpu idle injection mitigation which i will add in subsequent patches, if you are fine i will add cpu idle injection cooling map in this series only ? > commit 06eadce936971dd11279e53b6dfb151804137836 > ("arm64: dts: qcom: x1e80100: Drop unused passive thermal trip points for CPU") > > and add a single critical point instead, see > As critical shutdown is already supported by hardware, so we are not defining here. > commit 03f2b8eed73418269a158ccebad5d8d8f2f6daa1 > ("arm64: dts: qcom: x1e80100: Apply consistent critical thermal shutdown") > > Konrad