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Fri, 11 Apr 2025 05:02:32 -0700 (PDT) Message-ID: <47286334f978e1a9e19efa6fd3af3d06de863080.camel@rivosinc.com> Subject: Re: [PATCH v4 12/12] riscv: Documentation: add a description about dynamic ftrace From: Robbin Ehn To: Andy Chiu , linux-riscv@lists.infradead.org, alexghiti@rivosinc.com, palmer@dabbelt.com Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandre Ghiti , bjorn@rivosinc.com, puranjay12@gmail.com, paul.walmsley@sifive.com, greentime.hu@sifive.com, nick.hu@sifive.com, nylon.chen@sifive.com, eric.lin@sifive.com, vicent.chen@sifive.com, zong.li@sifive.com, yongxuan.wang@sifive.com, samuel.holland@sifive.com, olivia.chu@sifive.com, c2232430@gmail.com Date: Fri, 11 Apr 2025 14:02:30 +0200 In-Reply-To: <20250407180838.42877-12-andybnac@gmail.com> References: <20250407180838.42877-1-andybnac@gmail.com> <20250407180838.42877-12-andybnac@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.3-0ubuntu1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi, thanks, s/atmoic/atomic On Tue, 2025-04-08 at 02:08 +0800, Andy Chiu wrote: > +without a race condition. This series makes atmoic code patching possibl= e in ... > +setting the first instruction to AUIPC, and the second to NOP. Now, atmo= ic /Robbin > +patching is possible because the kernel only has to update one instructi= on. > +According to Ziccif, as long as an instruction is naturally aligned, the= ISA > +guarantee an=C2=A0 atomic update. > + > +By fixing down the first instruction, AUIPC, the range of the ftrace > trampoline > +is limited to +-2K from the predetermined target, ftrace_caller, due to = the > lack > +of immediate encoding space in RISC-V. To address the issue, we introduc= e > +CALL_OPS, where an 8B naturally align metadata is added in front of each > +pacthable function. The metadata is resolved at the first trampoline, th= en > the > +execution can be derect to another custom trampoline. > + > +CMODX in the User Space > +--------------------- > + > +Though fence.i is an unprivileged instruction, the default Linux ABI > prohibits > +the use of fence.i in userspace applications. At any point the scheduler= may > +migrate a task onto a new hart. If migration occurs after the userspace > +synchronized the icache and instruction storage with fence.i, the icache= on > the > +new hart will no longer be clean. This is due to the behavior of fence.i= only > +affecting the hart that it is called on. Thus, the hart that the task ha= s > been > +migrated to may not have synchronized instruction storage and icache. > =C2=A0 > =C2=A0There are two ways to solve this problem: use the riscv_flush_icach= e() > syscall, > =C2=A0or use the ``PR_RISCV_SET_ICACHE_FLUSH_CTX`` prctl() and emit fence= .i in