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From: Rik van Riel <riel@surriel.com>
To: Borislav Petkov <bp@kernel.org>, X86 <x86@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>,
	"Borislav Petkov (AMD)" <bp@alien8.de>,
		stable@kernel.org
Subject: Re: [PATCH] x86/CPU/AMD: Fix AMD TLBI Erratum #1718
Date: Fri, 02 Oct 2026 20:31:30 -0400	[thread overview]
Message-ID: <4746af392d093deb08101530be1c870f277a182b.camel@surriel.com> (raw)
In-Reply-To: <20261002211617.1001617-1-bp@kernel.org>

On Fri, 2026-10-02 at 14:16 -0700, Borislav Petkov wrote:
> From: "Borislav Petkov (AMD)" <bp@alien8.de>
> 
> The processor may fail to invalidate a TLB entry while executing an
> INVLPGB/TLBSYNC instruction pair.
> 
> Detect the erratum and apply a software workaround when a microcode
> fix
> is not present.
> 
> Fixes: 82378c6c2f43 ("x86/mm: Use INVLPGB for kernel TLB flushes")
> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> Cc: <stable@kernel.org>
> 
This same change fell out of my testing with
a reproducer earlier this year, so I know it
works, at least for the test case I have.

I am surprised that it was good enough to be 
a real workaround, but I'll take it ;)

Tested-by: Rik van Riel <riel@surriel.com>
Reviewed-by: Rik van Riel <riel@surriel.com>

-- 
All Rights Reversed.

  reply	other threads:[~2026-10-03  0:31 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-02 21:16 Borislav Petkov
2026-10-03  0:31 ` Rik van Riel [this message]
2026-10-03  0:44   ` Borislav Petkov
2026-10-03 21:24 ` Lorenzo Stoakes (ARM)
2026-10-03 21:44   ` Borislav Petkov
2026-10-05 17:42 ` [tip: x86/urgent] " tip-bot2 for Borislav Petkov (AMD)

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