mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
To: Biju Das <biju.das.jz@bp.renesas.com>,
	Tommaso Merciai <tomm.merciai@gmail.com>,
	geert <geert@linux-m68k.org>,
	"laurent.pinchart" <laurent.pinchart@ideasonboard.com>
Cc: "linux-renesas-soc@vger.kernel.org"
	<linux-renesas-soc@vger.kernel.org>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	"magnus.damm" <magnus.damm@gmail.com>,
	Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v5 09/20] dt-bindings: display: renesas,rzg2l-du: Add support for RZ/G3E SoC
Date: Tue, 17 Mar 2026 18:10:09 +0100	[thread overview]
Message-ID: <474c1eff-96ea-41b8-81fe-970caf796e6e@bp.renesas.com> (raw)
In-Reply-To: <TY3PR01MB113460BED5F6F944C0FD4DDB8866FA@TY3PR01MB11346.jpnprd01.prod.outlook.com>

Hi Biju,
Thanks for your review.

On 2/15/26 09:11, Biju Das wrote:
> Hi Tommaso,
> 
> Thanks for the patch.
> 
>> -----Original Message-----
>> From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
>> Sent: 13 February 2026 16:28
>> Subject: [PATCH v5 09/20] dt-bindings: display: renesas,rzg2l-du: Add support for RZ/G3E SoC
>>
>> The RZ/G3E Soc has 2 LCD controller (LCDC), contain a Frame Compression Processor (FCPVD), a Video
>> Signal Processor (VSPD), Video Signal Processor (VSPD), and Display Unit (DU).
>>
>>   - LCDC0 supports DSI and LVDS (single or dual-channel) outputs.
>>   - LCDC1 supports DSI, LVDS (single-channel), and RGB outputs.
>>
>> Add new SoC-specific compatible string 'renesas,r9a09g047-du'.
>>
>> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
>> ---
>> v4->v5:
>>   - Dropped renesas,id property and updated bindings
>>     accordingly.
>>
>> v2->v3:
>>   - No changes.
>>
>> v2->v3:
>>   - No changes.
>>
>> v1->v2:
>>   - Use single compatible string instead of multiple compatible strings
>>     for the two DU instances, leveraging a 'renesas,id' property to
>>     differentiate between DU0 and DU1.
>>   - Updated commit message accordingly.
>>
>>   .../bindings/display/renesas,rzg2l-du.yaml    | 22 +++++++++++++++++++
>>   1 file changed, 22 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
>> b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
>> index 2cc66dcef870..be50b153d651 100644
>> --- a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
>> +++ b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
>> @@ -20,6 +20,7 @@ properties:
>>         - enum:
>>             - renesas,r9a07g043u-du # RZ/G2UL
>>             - renesas,r9a07g044-du # RZ/G2{L,LC}
>> +          - renesas,r9a09g047-du # RZ/G3E
>>             - renesas,r9a09g057-du # RZ/V2H(P)
>>         - items:
>>             - enum:
>> @@ -137,6 +138,27 @@ allOf:
>>
>>             required:
>>               - port@0
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            const: renesas,r9a09g047-du
>> +    then:
>> +      properties:
>> +        ports:
>> +          properties:
>> +            port@0:
>> +              description: DSI
>> +            port@1:
>> +              description: LVDS Channel 0
>> +            port@2:
>> +              description: LVDS Channel 1
>> +            port@3:
>> +              description: DPAD
>> +
>> +          required:
>> +            - port@0
>> +            - port@1
> 
> 
> LCDC0 has port@0, port@1 and port@2
> LCDC1 has port@0, port@1 and port@3
> 
> Looks like from the above port@2 and port@3 are optional??

As we are using the the same compatible for both DUs the only way I 
found to differentiate betweeen DU0 and DU1 is the introduction of

	renesas,id = <0> -> DU0
	renesas,id = <1> -> DU1

Like proposed in v4 [0].
What do you think? Suggestions?


> Also not sure to make port@1 for DPAD for consistency with RZ/G2L??
> Do you see any advantage by making port@1 for LVDS0?

I'm planning to rework v6 with the following:

   - if:
       properties:
         compatible:
           contains:
             const: renesas,r9a09g047-du
     then:
       properties:
         ports:
           properties:
             port@0:
               description: DSI
             port@1:
               description: DPAD
             port@2:
               description: LVDS, Channel 0
             port@3:
               description: LVDS, Channel 1

           required:
             - port@0
             - port@3

> 
> Cheers,
> Biju
> 
> 

[0] 
https://patchwork.kernel.org/project/linux-renesas-soc/patch/4986c5a3c5cda9e754ed1f9f7121b32e9bf4499f.1770030493.git.tommaso.merciai.xr@bp.renesas.com/

Kind Regards,
Tommaso


  parent reply	other threads:[~2026-03-17 17:10 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-13 16:27 [PATCH v5 00/20] Add support for DU and DSI on the Renesas " Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 01/20] clk: renesas: rzv2h: Add PLLDSI clk mux support Tommaso Merciai
2026-02-27 10:47   ` Geert Uytterhoeven
2026-02-27 17:24     ` Tommaso Merciai
2026-02-27 18:29       ` Geert Uytterhoeven
2026-02-13 16:27 ` [PATCH v5 02/20] clk: renesas: r9a09g047: Add CLK_PLLETH_LPCLK support Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 03/20] clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1} clocks Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 04/20] clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1}_DIV7 clocks Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 05/20] clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1}_CSDIV clocks Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 06/20] clk: renesas: r9a09g047: Add support for SMUX2_DSI{0,1}_CLK Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 07/20] clk: renesas: r9a09g047: Add support for DSI clocks and resets Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 08/20] clk: renesas: r9a09g047: Add support for LCDC{0,1} " Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 09/20] dt-bindings: display: renesas,rzg2l-du: Add support for RZ/G3E SoC Tommaso Merciai
2026-02-15  8:11   ` Biju Das
2026-02-24  8:17     ` Tommaso Merciai
2026-03-17 17:10     ` Tommaso Merciai [this message]
2026-03-17 17:14       ` Biju Das
2026-02-23 17:47   ` Rob Herring (Arm)
2026-02-13 16:27 ` [PATCH v5 10/20] dt-bindings: display: bridge: renesas,dsi: " Tommaso Merciai
2026-03-17 12:46   ` Biju Das
2026-02-13 16:27 ` [PATCH v5 11/20] drm: renesas: rz-du: mipi_dsi: Add out_port to OF data Tommaso Merciai
2026-03-17 12:50   ` Biju Das
2026-03-17 17:30     ` Tommaso Merciai
2026-03-18  8:06       ` Biju Das
2026-02-13 16:27 ` [PATCH v5 12/20] drm: renesas: rz-du: mipi_dsi: Add RZ_MIPI_DSI_FEATURE_GPO0R feature Tommaso Merciai
2026-03-17 13:03   ` Biju Das
2026-03-17 18:01     ` Tommaso Merciai
2026-03-18  7:50       ` Biju Das
2026-02-13 16:27 ` [PATCH v5 13/20] drm: renesas: rz-du: mipi_dsi: Add support for RZ/G3E Tommaso Merciai
2026-03-17 13:15   ` Biju Das
2026-02-13 16:27 ` [PATCH v5 14/20] drm: renesas: rz-du: Add RZ/G3E support Tommaso Merciai
2026-03-17 13:35   ` Biju Das
2026-03-17 17:36     ` Tommaso Merciai
2026-03-17 18:24     ` Tommaso Merciai
2026-03-18 14:45   ` Tommaso Merciai
2026-06-10 21:22     ` Laurent Pinchart
2026-06-11 14:48       ` Tommaso Merciai
2026-06-28 14:18         ` Biju Das
2026-02-13 16:27 ` [PATCH v5 15/20] media: dt-bindings: media: renesas,vsp1: Document RZ/G3E Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 16/20] media: dt-bindings: media: renesas,fcp: Document RZ/G3E SoC Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 17/20] arm64: dts: renesas: r9a09g047: Add fcpvd{0,1} nodes Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 18/20] arm64: dts: renesas: r9a09g047: Add vspd{0,1} nodes Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 19/20] arm64: dts: renesas: r9a09g047: Add DU{0,1} and DSI nodes Tommaso Merciai
2026-02-13 16:27 ` [PATCH v5 20/20] arm64: dts: renesas: r9a09g047e57-smarc: Enable DU0 and DSI support Tommaso Merciai

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=474c1eff-96ea-41b8-81fe-970caf796e6e@bp.renesas.com \
    --to=tommaso.merciai.xr@bp.renesas.com \
    --cc=airlied@gmail.com \
    --cc=biju.das.jz@bp.renesas.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=geert+renesas@glider.be \
    --cc=geert@linux-m68k.org \
    --cc=krzk+dt@kernel.org \
    --cc=laurent.pinchart+renesas@ideasonboard.com \
    --cc=laurent.pinchart@ideasonboard.com \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=maarten.lankhorst@linux.intel.com \
    --cc=magnus.damm@gmail.com \
    --cc=mripard@kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=robh@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=simona@ffwll.ch \
    --cc=tomm.merciai@gmail.com \
    --cc=tzimmermann@suse.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®