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Thu, 15 Oct 2026 01:08:55 -0700 (PDT) X-Received: by 2002:a05:620a:4449:b0:939:9ef4:79eb with SMTP id af79cd13be357-93ebd27cc8fmr3390562685a.6.1792051733632; Thu, 15 Oct 2026 01:08:53 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c3ed963e0dbsm93441866b.23.2026.10.15.01.08.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Oct 2026 01:08:52 -0700 (PDT) Message-ID: <47797de1-b50d-4b4f-989c-00ac2427d40a@oss.qualcomm.com> Date: Thu, 15 Oct 2026 10:08:48 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC 07/16] clk: qcom: Add clock-owned GenPD DVFS aggregation To: Dmitry Baryshkov Cc: Konrad Dybcio , Stephen Boyd , Brian Masney , Jerome Brunet , Viresh Kumar , Nishanth Menon , "Rafael J. Wysocki" , Pavel Machek , Len Brown , Greg Kroah-Hartman , Danilo Krummrich , Johan Hovold , Ulf Hansson , Bjorn Andersson , Abel Vesa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Mike Tipton , Taniya Das , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, driver-core@lists.linux.dev, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org References: <20261014-topic-qc_clk_dvfs-v1-0-3041b788e9f7@oss.qualcomm.com> <20261014-topic-qc_clk_dvfs-v1-7-3041b788e9f7@oss.qualcomm.com> <6c9937a6-88c3-4e5f-85a3-73d929d3ba01@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE1MDAzMiBTYWx0ZWRfX0YTGFQcJ3taD B2SGJYBy+YJvOa9TXl4q/phN+dykXqFxT5xaztPSaJ074DlUov2fW6wLaTvjmqgF/a/xiDsMJKD 0w0FT6Ne7kNrEzq/6C82aoGtJdghqZcGGVIb8KAihyqscrbE1iARzi3v5b5Eh5SrsWdyg4u0rnK Ybdop4FrqVr61QQV4IzrgmdXYQxuwGSdVZHL2Bzt/2UAxI8tQT197+OVwXgYw6NtBMRkVC5UASn olSITPTTSJjyTgZn3ahbz1rre8AHsIPwoAF/DIw7HNNCVz6AScdL+BPZmQQSSxk4jqToMi5Rcr7 XYeDpbE4Jp0ZkxXG//SYUugEAloM8DB7NMct6jgV6w5mm2/tOmGF+ljJdpV7eF3QWpZ35M+PCr2 UCs1uKLUJpm3w7Ce8TyTfABDzQrfbZZRK47pcqGOy9I6fYO6jFb/EsbAJ1FxzrzI2dkjwAMyjBn 1VEb+jP1Q9qL6CJePtQ== X-Proofpoint-GUID: 2WUHZ8ShDktwAQ3Kaqqopy5fP1NUOHg_ X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE1MDAzMiBTYWx0ZWRfX8OYNnbL324Xx EC7aYXr9eklM5U6wIGhJBRz1Kk7hldiJ+rsHFPBjb1jmjlFwxxgRB15gE8IBw39k4gShxgfRNKc EE0uM38A7X9a1PhpNZx62iYKxGZKPxA= X-Authority-Analysis: v=2.4 cv=BqUIUoX5 c=1 sm=1 tr=0 ts=6ad08a18 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=tlWqZDqU6_vpIpeepkAA:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 X-Proofpoint-ORIG-GUID: 2WUHZ8ShDktwAQ3Kaqqopy5fP1NUOHg_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-13_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 spamscore=0 bulkscore=0 suspectscore=0 clxscore=1015 malwarescore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610150032 On 10/14/26 7:31 PM, Dmitry Baryshkov wrote: > On Wed, Oct 14, 2026 at 06:45:46PM +0200, Konrad Dybcio wrote: >> On 10/14/26 6:30 PM, Dmitry Baryshkov wrote: >>> On Wed, Oct 14, 2026 at 05:26:00PM +0200, Konrad Dybcio wrote: >>>> On 10/14/26 4:36 PM, Dmitry Baryshkov wrote: >>>>> On Wed, Oct 14, 2026 at 02:19:07PM +0200, Konrad Dybcio wrote: >>>>>> From: Konrad Dybcio [...] >> Right, but the meaningful difference here is that the consumers >> only know they need a certain frequency. The required power votes >> from that don't stem from the consumer's requirements. They stem >> from the clock controller's inner workings that are necessary to >> fulfill the consumer's demand. > > Doesn't Iris core also have "we need this power to work on this > frequency" kind of requirements? My assumption has always been that > those are just folded into the clock requrements. My understanding is that is just an effect of the requirements of the clock controller. >>>> The Qualcomm case is easy - RPMH is *always* reachable, so the >>>> pmdomain provider needs no clocks itself. For the other cases, >>>> "patches welcome". >>> >>> Ok. There is a promise that I2C PMICs will never ever be involved in the >>> clock / power tables. >> >> Or at least that someone who needs them will contribute a >> solution to this problem. > > I meant actual I2C PMICs, like PM8008. Yes, I know >>>>>> +static unsigned int >>>>>> +qcom_clk_dvfs_aggregate(struct qcom_clk_dvfs_rail_voter *rail_voter) >>>>>> +{ >>>>>> + struct qcom_clk_dvfs_vote *vote; >>>>>> + unsigned int level = 0; >>>>>> + >>>>>> + list_for_each_entry(vote, &rail_voter->votes, node) >>>>>> + level = max(level, vote->level); >>>>>> + >>>>>> + return max(level, rail_voter->safety_floor_level); >>>>> >>>>> I guess you want to avoid having too many voters, but would it be >>>>> possible to have one voter per 'signficant' clock and let GenPD itself >>>>> aggregate all the votes? >>>> >>>> What does "significant" mean here? >>> >>> I'd define it as "using a different power domain or requiring a >>> different corner". >> >> I still don't get it > > When the consumer votes for a frequency A / domain BX / level cc, usually > the parent clock (at the corresponding frquency nA) also has domain BX > and level cc. Sometimes (like in the case of PLLs) it's not the case. > The domain might change or the level might change. In those cases that > clock must have an explicit voting (I'd still prefer OPP). I think what you believe is the PLL case is actually more common - the branch, its RCG, the PLL upstream and anything inbetween may have a different list of [(rail, freq, level)] settings (I say list specifically because e.g. the branch may need CX, the RCG may need MXC+MMCX and the PLL above may need CX+MXA at various levels. Konrad