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<60acb594-abe3-912f-9702-2f34961e575d@redhat.com> <25d2cf1f-11ee-ecba-73a9-15a9553a3d96@redhat.com> From: Brijesh Singh Message-ID: <47b8f9dc-fb55-f14d-cb88-343810ad5763@amd.com> Date: Fri, 24 Aug 2018 13:47:10 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <25d2cf1f-11ee-ecba-73a9-15a9553a3d96@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SN6PR02CA0006.namprd02.prod.outlook.com (2603:10b6:805:a2::19) To SN6PR12MB2688.namprd12.prod.outlook.com (2603:10b6:805:6f::29) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 181081f0-7381-4951-8dac-08d609f202fd X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: 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X-Microsoft-Exchange-Diagnostics: 1;SN6PR12MB2688;20:+SR/uDUMfdVlEMZ+Yu88o/OJ54XEsnquMLMhqgTYCu8WtWJ9fpVJ4tO7NiSNxaWkYlwVNCVPbHwm9r8k9T9mGc8QBj9YvdAwJCwZi3SY64QXMP6zj68RduTj9bYTTjycyX+IhmgFfq3MyMr5CK/KiULeRwJwIGrxj1H3mEH1+F3MVEVo5K9CO5AxNW5dkWXZehO0QJrC73QwE0xtlDe3sMrAmeO16kwF4HdTDK1g68e6bFkNhzp4sPijgkYvq/iq X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Aug 2018 18:47:14.9815 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 181081f0-7381-4951-8dac-08d609f202fd X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR12MB2688 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/24/2018 10:50 AM, Paolo Bonzini wrote: > On 24/08/2018 17:41, Brijesh Singh wrote: >>>> >>>> Wouldn't that result in exposing/leaking whatever code/data happened >>>> to reside on the same 2M page (or corrupting it if the entire page >>>> isn't decrypted)?  Or are you suggesting that we'd also leave the >>>> encrypted mapping intact? >>> >>> Yes, exactly the latter, because... >> >> >> Hardware does not enforce coherency between the encrypted and >> unencrypted mapping for the same physical page. So, creating a >> two mapping of same physical address will lead a possible data >> corruption. >> >> Note, SME creates two mapping of the same physical address to perform >> in-place encryption of kernel and initrd images; this is a special case >> and APM documents steps on how to do this. > > Ah, so that's what I was thinking about. But a single cache line would > never be used both encrypted and unencrypted, would it? > No. If we create two mapping of same physical address and ensure that accesses are cache line aligned and size then I think we will safe from cache point of view. I have not tried early remap from kvmclock_init() yet and not sure if it will work so early. The downside of this approach is, we will put too many constraints on caller; it will need to ensure that variables are cache line aligned and sized, never accessed with C=1, and must create a new mapping before accessing it. I am more inclined towards creating a new section with PMD aligned and sized. This section will contains the decrypted data. In early boot code we will update the mapping with C=0. If caller wants to create a shared variable then it can do so with: static int foo __decrypted; I will submit patch fir review. thanks