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[130.180.211.218]) by smtp.googlemail.com with ESMTPSA id k10-20020adfe8ca000000b003198d274208sm2250783wrn.86.2023.08.18.03.06.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 18 Aug 2023 03:06:50 -0700 (PDT) Message-ID: <48283a14-d2af-630c-40c0-d0316cd30d69@linaro.org> Date: Fri, 18 Aug 2023 12:06:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH] clocksource/drivers/arm_arch_timer: Disable timer before programming CVAL Content-Language: en-US To: =?UTF-8?B?V2FsdGVyIENoYW5nICjlvLXntq3lk7Ip?= , "maz@kernel.org" , "mark.rutland@arm.com" , "tglx@linutronix.de" , "matthias.bgg@gmail.com" , "angelogioacchino.delregno@collabora.com" Cc: "linux-kernel@vger.kernel.org" , "linux-mediatek@lists.infradead.org" , wsd_upstream , "stable@vger.kernel.org" , =?UTF-8?B?Q2h1bi1IdW5nIFd1ICjlt6vpp7/lro8p?= , "linux-arm-kernel@lists.infradead.org" , =?UTF-8?B?U3RhbmxleSBDaHUgKOacseWOn+mZnik=?= , =?UTF-8?B?RnJlZGR5IEhzaW4gKOi+m+aBkuixkCk=?= References: <20230717090735.19370-1-walter.chang@mediatek.com> <9c428d54c07f60e79c63119621bf03b797f79a37.camel@mediatek.com> From: Daniel Lezcano In-Reply-To: <9c428d54c07f60e79c63119621bf03b797f79a37.camel@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 18/08/2023 11:29, Walter Chang (張維哲) wrote: > On Mon, 2023-07-17 at 17:07 +0800, walter.chang@mediatek.com wrote: >> From: Walter Chang >> >> Due to the fact that the use of `writeq_relaxed()` to program CVAL is >> not guaranteed to be atomic, it is necessary to disable the timer >> before >> programming CVAL. >> >> However, if the MMIO timer is already enabled and has not yet >> expired, >> there is a possibility of unexpected behavior occurring: when the CPU >> enters the idle state during this period, and if the CPU's local >> event >> is earlier than the broadcast event, the following process occurs: >> >> tick_broadcast_enter() >> tick_broadcast_oneshot_control(TICK_BROADCAST_ENTER) >> __tick_broadcast_oneshot_control() >> ___tick_broadcast_oneshot_control() >> tick_broadcast_set_event() >> clockevents_program_event() >> set_next_event_mem() >> >> During this process, the MMIO timer remains enabled while programming >> CVAL. To prevent such behavior, disable timer explicitly prior to >> programming CVAL. >> >> Fixes: 8b82c4f883a7 ("clocksource/drivers/arm_arch_timer: Move MMIO >> timer programming over to CVAL") >> Cc: stable@vger.kernel.org >> Signed-off-by: Walter Chang >> --- >> drivers/clocksource/arm_arch_timer.c | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/drivers/clocksource/arm_arch_timer.c >> b/drivers/clocksource/arm_arch_timer.c >> index e733a2a1927a..7dd2c615bce2 100644 >> --- a/drivers/clocksource/arm_arch_timer.c >> +++ b/drivers/clocksource/arm_arch_timer.c >> @@ -792,6 +792,13 @@ static __always_inline void >> set_next_event_mem(const int access, unsigned long e >> u64 cnt; >> >> ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk); >> + >> +/* Timer must be disabled before programming CVAL */ >> +if (ctrl & ARCH_TIMER_CTRL_ENABLE) { >> +ctrl &= ~ARCH_TIMER_CTRL_ENABLE; >> +arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, >> clk); >> +} >> + >> ctrl |= ARCH_TIMER_CTRL_ENABLE; >> ctrl &= ~ARCH_TIMER_CTRL_IT_MASK; >> > > Gentle ping for this patch. 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