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[2003:ea:8bd4:d600:9545:19fe:eae2:90aa]) by smtp.googlemail.com with ESMTPSA id c129-v6sm642645wmh.2.2018.08.03.13.46.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 Aug 2018 13:46:33 -0700 (PDT) Subject: Re: [PATCH] genirq: Consider domain hierarchy when checking for IRQCHIP_ONESHOT_SAFE To: Thomas Gleixner Cc: Linux Kernel Mailing List , Marc Zyngier References: From: Heiner Kallweit Message-ID: <483980a3-bd1a-1a05-0372-d608db941251@gmail.com> Date: Fri, 3 Aug 2018 22:46:26 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03.08.2018 22:00, Thomas Gleixner wrote: > On Fri, 3 Aug 2018, Heiner Kallweit wrote: > >> In case of a domain hierarchy we may miss the IRQCHIP_ONESHOT_SAFE >> flag because we look at top of the stack only. See also discussion >> here: https://marc.info/?l=linux-kernel&m=153301773524685&w=2 > > I think you misunderstood: > >> I think the top most chip is the key, the rest of the hierarchy is >> irrelevant because the top most chip is the one which is responsible for >> not creating an interrupt storm after the interrupt got acknowledged. > > The top most chip in the hierarchy, e.g. the PCI MSI one, is the key. If > that one is badly implemented and starts to resend after ack/eoi then the > interrupt storm happens. The lower layers in the hierarchy down to the > vector domain are just transporting what the top level chip does. So it is > actively wrong to flag the lower layers. > > if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE) > > is the correct check as it looks at the topmost irq chip which is the one > which initiates the interrupt. > So you're saying it's correct as it is now in __setup_irq(). Then I don't really understand Marc's following comment from earlier in the discussion. What else needs to be done if it is correct already? "We could also consider extending this to support interrupt hierarchies, as __setup_irq() seems only concerned with the top of the stack (an IRQ provided by a generic MSI stack and backed by an irqchip providing IRQCHIP_ONESHOT_SAFE would go unnoticed)." > Thanks, > > tglx >