From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753260AbdHWDV3 (ORCPT ); Tue, 22 Aug 2017 23:21:29 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:55450 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753057AbdHWDV1 (ORCPT ); Tue, 22 Aug 2017 23:21:27 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5CC1D603D2 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org Subject: Re: [PATCH V10 2/3] PCI: handle CRS returned by device after FLR To: Bjorn Helgaas Cc: linux-pci@vger.kernel.org, timur@codeaurora.org, alex.williamson@redhat.com, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Bjorn Helgaas , linux-kernel@vger.kernel.org References: <1502470596-4112-1-git-send-email-okaya@codeaurora.org> <1502470596-4112-2-git-send-email-okaya@codeaurora.org> <20170818210134.GO28977@bhelgaas-glaptop.roam.corp.google.com> <4da26c10-3426-e752-4a59-25bb59cde8cd@codeaurora.org> <20170821180030.GB28977@bhelgaas-glaptop.roam.corp.google.com> From: Sinan Kaya Message-ID: <48497e49-21c2-9289-f546-2b0ef938beb0@codeaurora.org> Date: Tue, 22 Aug 2017 23:21:24 -0400 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <20170821180030.GB28977@bhelgaas-glaptop.roam.corp.google.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 8/21/2017 2:00 PM, Bjorn Helgaas wrote: > On Mon, Aug 21, 2017 at 09:44:09AM -0400, Sinan Kaya wrote: >> Hi Bjorn, >> >> On 8/18/2017 5:01 PM, Bjorn Helgaas wrote: > > It would still be interesting to see the lspci output. Likely in the upstream bridge will be set even before the FLR because of > aborts during enumeration. The PCI core should probably clear that > after enumeration. I expect that if you manually clear it with > setpci, do the lspci, do the FLR, do another lspci, you will probably > see consider clearing it here as well. Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- TAbort- TAbort- SERR- TAbort-