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Thu, 05 Sep 2024 14:15:53 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 485EFq25019533 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 5 Sep 2024 14:15:52 GMT Received: from [10.110.102.234] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 5 Sep 2024 07:15:48 -0700 Message-ID: <4896510e-6e97-44e0-b3d7-7a7230f935ec@quicinc.com> Date: Thu, 5 Sep 2024 07:15:48 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 16/21] dt-bindings: spi: document support for SA8255p To: Krzysztof Kozlowski , Andrew Lunn CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Praveen Talari References: <20240828203721.2751904-1-quic_nkela@quicinc.com> <20240903220240.2594102-1-quic_nkela@quicinc.com> <20240903220240.2594102-17-quic_nkela@quicinc.com> <9a655c1c-97f6-4606-8400-b3ce1ed3c8bf@kernel.org> <516f17e6-b4b4-4f88-a39f-cc47a507716a@quicinc.com> <2f11f622-1a00-4558-bde9-4871cdc3d1a6@lunn.ch> <204f5cfe-d1ed-40dc-9175-d45f72395361@quicinc.com> <70c75241-b6f1-4e61-8451-26839ec71317@kernel.org> <75768451-4c85-41fa-82b0-8847a118ea0a@quicinc.com> Content-Language: en-US From: Nikunj Kela In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: mwTkK25Wdk3u_xGDqOaQj7Oc4I2DLIkL X-Proofpoint-ORIG-GUID: mwTkK25Wdk3u_xGDqOaQj7Oc4I2DLIkL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-05_09,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 phishscore=0 impostorscore=0 malwarescore=0 mlxlogscore=999 mlxscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409050106 On 9/5/2024 7:09 AM, Krzysztof Kozlowski wrote: > On 05/09/2024 16:03, Nikunj Kela wrote: >> On 9/5/2024 1:04 AM, Krzysztof Kozlowski wrote: >>> On 04/09/2024 23:06, Nikunj Kela wrote: >>>> On 9/4/2024 9:58 AM, Andrew Lunn wrote: >>>>>> Sorry, didn't realize SPI uses different subject format than other >>>>>> subsystems. Will fix in v3. Thanks >>>>> Each subsystem is free to use its own form. e.g for netdev you will >>>>> want the prefix [PATCH net-next v42] net: stmmac: dwmac-qcom-ethqos: >>>> of course they are! No one is disputing that. >>>>> This is another reason why you should be splitting these patches per >>>>> subsystem, and submitting both the DT bindings and the code changes as >>>>> a two patch patchset. You can then learn how each subsystem names its >>>>> patches. >>>> Qualcomm QUPs chips have serial engines that can be configured as >>>> UART/I2C/SPI so QUPs changes require to be pushed in one series for all >>>> 3 subsystems as they all are dependent. >>> No, they are not dependent. They have never been. Look how all other >>> upstreaming process worked in the past. >> Top level QUP node(patch#18) includes i2c,spi,uart nodes. >> soc/qcom/qcom,geni-se.yaml validate those subnodes against respective >> yaml. The example that is added in YAML file for QUP node will not find >> sa8255p compatibles if all 4 yaml(qup, i2c, spi, serial nodes) are not >> included in the same series. >> > So where is the dependency? I don't see it. Ok, what is your suggestion on dt-schema check failure in that case as I mentioned above? Shall we remove examples from yaml that we added? > Anyway, if you insist, > provide reasons why this should be the only one patchset - from all > SoCs, all companies, all developers - getting an exception from standard > merging practice and from explicit rule about driver change. See > submitting bindings. > > This was re-iterated over and over, but you keep claiming you need some > sort of special treatment. If so, please provide arguments WHY this > requires special treatment and *all* other contributions are fine with it. > > Best regards, > Krzysztof >