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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b5faa32ad8sm7118215ad.31.2026.04.16.22.24.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Apr 2026 22:24:10 -0700 (PDT) Message-ID: <48bbcc34-f5bf-4ada-8210-b115f72ee850@oss.qualcomm.com> Date: Fri, 17 Apr 2026 13:24:07 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] spmi: spmi-pmic-arb: add support for PMIC arbiter v8.5 From: Fenglin Wu To: Dmitry Baryshkov Cc: Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Subbaraman Narayanamurthy , David Collins , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@oss.qualcomm.com References: <20260401-hawi-spmi-v1-0-c40963041078@oss.qualcomm.com> <20260401-hawi-spmi-v1-2-c40963041078@oss.qualcomm.com> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE3MDA0OSBTYWx0ZWRfX/sChGFTEEWYD yypSb2udnjnTmt9iJ2YrMWGq30LFxJIOO4N8X/R8wmtFZsvFzfUbtxUow4lFOANfYDl5ZaqHEWQ kF+Hvx+hCL3t8N8p/1B66vSwbNNn1mrKS2g+kEUK4nLNddXZslLwYZeCKp8hGsLgUVNC0iF1HMe IGIptzcAfQSRQetrTQDfojvfpXM4tcb/sj5aYEF6XyRwQ16JRQ4iossqZDCxzZp4elA1n8myUxs DL4oYm2HHrL1i8TIT4RiIXSZv8/+KkfuP2Dmr5JqqfjJOxRAm8F90bLgURejSMcvo4Z7nl1hxa3 TiLXbk1gdDt097rc8Morw41k2MwKqbcTLhOODPzlm/AHMi8+Ry7xOtRDNRCq5vN9qWPV0E/F4+H LMXxcRiQc0tBeHLXf+pHXPfuPls1xYHS++0c5FSQONYh8DadA0lSxU52i4HsTh5G/4Gd11pdeqz dPQu+r8bZWZk4s+tnZw== X-Authority-Analysis: v=2.4 cv=avuCzyZV c=1 sm=1 tr=0 ts=69e1c3fc cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=nEY8QQf2np8axcGL7LcA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-GUID: xCMWJjWXSHMk5boj6NJcGr5nbEnoYBsN X-Proofpoint-ORIG-GUID: xCMWJjWXSHMk5boj6NJcGr5nbEnoYBsN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_04,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 spamscore=0 bulkscore=0 priorityscore=1501 adultscore=0 suspectscore=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604170049 On 4/2/2026 12:18 PM, Fenglin Wu wrote: > > On 4/1/2026 7:22 PM, Dmitry Baryshkov wrote: >> On Wed, Apr 01, 2026 at 02:41:24AM -0700, Fenglin Wu wrote: >>> PMIC arbiter v8.5 is an extension of PMIC arbiter v8 that updated >>> the definition of the channel status register bit fields. Add support >>> to handle this difference. >>> >>> Signed-off-by: Fenglin Wu >>> --- >>>   drivers/spmi/spmi-pmic-arb.c | 69 >>> ++++++++++++++++++++++++++++++++++++++------ >>>   1 file changed, 60 insertions(+), 9 deletions(-) >>> >>> diff --git a/drivers/spmi/spmi-pmic-arb.c >>> b/drivers/spmi/spmi-pmic-arb.c >>> index 69f8d456324a..deeaa39bb647 100644 >>> --- a/drivers/spmi/spmi-pmic-arb.c >>> +++ b/drivers/spmi/spmi-pmic-arb.c >>> @@ -28,6 +28,7 @@ >>>   #define PMIC_ARB_VERSION_V5_MIN        0x50000000 >>>   #define PMIC_ARB_VERSION_V7_MIN        0x70000000 >>>   #define PMIC_ARB_VERSION_V8_MIN        0x80000000 >>> +#define PMIC_ARB_VERSION_V8P5_MIN    0x80050000 >>>   #define PMIC_ARB_INT_EN            0x0004 >>>     #define PMIC_ARB_FEATURES        0x0004 >>> @@ -63,11 +64,34 @@ >>>   #define SPMI_OWNERSHIP_PERIPH2OWNER(X)    ((X) & 0x7) >>>     /* Channel Status fields */ >>> -enum pmic_arb_chnl_status { >>> -    PMIC_ARB_STATUS_DONE    = BIT(0), >>> -    PMIC_ARB_STATUS_FAILURE    = BIT(1), >>> -    PMIC_ARB_STATUS_DENIED    = BIT(2), >>> -    PMIC_ARB_STATUS_DROPPED    = BIT(3), >>> +struct pmic_arb_chnl_status_mask { >>> +    u8    done; >>> +    u8    failure; >>> +    u8    crc; >>> +    u8    parity; >>> +    u8    nack; >>> +    u8    denied; >>> +    u8    dropped; >>> +}; >>> + >>> +static const struct pmic_arb_chnl_status_mask chnl_status_mask = { >>> +    .done        = BIT(0), >>> +    .failure    = BIT(1), >>> +    .crc        = 0, >>> +    .parity        = 0, >>> +    .nack        = 0, >>> +    .denied        = BIT(2), >>> +    .dropped    = BIT(3), >>> +}; >>> + >>> +static const struct pmic_arb_chnl_status_mask chnl_status_mask_v8p5 >>> = { >>> +    .done        = BIT(0), >>> +    .failure    = BIT(1), >>> +    .crc        = BIT(2), >>> +    .parity        = BIT(3), >>> +    .nack        = BIT(4), >>> +    .denied        = BIT(5), >>> +    .dropped    = BIT(6), >> Would it be better to extract generation-specific callback to decode the >> error rather than defining the list of masks? > > Are you proposing to add a callback in pmic_arb_ver_ops, like > '*check_chnl_status', and create separate implementations for PMIC > arbiter versions before and after v8.5? > > This approach would add more extensive code changes with some code > duplication, especially for handling common error bits shared across > all versions—even if they only print error messages and return an > error code. Is that a concern? > > Fenglin Hi Dmitry, Please let me know if this your preferred way and if you are fine with the concern that I mentioned. I can come up with this approach and post a new patch. Thanks Fenglin