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Mon, 06 Jul 2026 04:03:09 -0700 (PDT) X-Received: by 2002:a17:903:1208:b0:2c9:e9c7:2b59 with SMTP id d9443c01a7336-2cbb9ee5fafmr89799535ad.35.1783335789224; Mon, 06 Jul 2026 04:03:09 -0700 (PDT) Received: from [10.217.222.146] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cad77651c2sm48462225ad.49.2026.07.06.04.03.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 06 Jul 2026 04:03:08 -0700 (PDT) Message-ID: <48bee604-53f7-49ed-a757-554c4a83aa23@oss.qualcomm.com> Date: Mon, 6 Jul 2026 16:33:03 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 2/3] arm64: dts: qcom: kodiak: enable inline crypto engine for SDHC To: Konrad Dybcio , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neeraj Soni References: <20260629-ice_emmc_support-v8-0-1a26e1717b85@oss.qualcomm.com> <20260629-ice_emmc_support-v8-2-1a26e1717b85@oss.qualcomm.com> <1a0b91c6-5e17-4330-a8ab-ac14d3339024@oss.qualcomm.com> <56ab63c3-4288-45f7-bfea-d40046437a9f@oss.qualcomm.com> Content-Language: en-US From: Kuldeep Singh In-Reply-To: <56ab63c3-4288-45f7-bfea-d40046437a9f@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: lsh0885dwUj3PbS77i-WLTkJzszaQvTP X-Proofpoint-Spam-Info: AW1haW4tMjYwNzA2MDExMiBTYWx0ZWRfX9SBCaT2aqD83 C226mjnBypxXjSe+mcGBSTr/Gi+nW4v7BPF9NBql046n5cHuVHOR4HGLW/pHKTVJJ0X0H62MuZZ Bi0fHp2DzPGzlrwPd/bNHX1+F8dsFzs= X-Authority-Analysis: v=2.4 cv=Mo1iLWae c=1 sm=1 tr=0 ts=6a4b8b6e cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=HXWJYtWaUMqhmI3DdLQA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzA2MDExMiBTYWx0ZWRfX/lY89w/GaIon +8Ng6bMP3YIKximwmgtzE0KO6MBN90sw8JJDq3Jl6hEwDfPPf2UZ35UOYfdqO8zSqNQoSjuIFxM 77yIZB5f+4s+5/rjK8cO9Rn+gUAeWXXsIHaNf3FkyroUpLdst8UqNqRgH5e0usWxFeFGnfYIIf0 yHAG8E527m5xSIeTgcejWf9gcTCb8vHfZMdA7l1bWMyd4jO2UjsE/ubtbuXAFW08pT1HPino8sG TzhAO68LhvTSbjpWw3vkViVXo+tLT4dX8TEszGsAU9FmD5C3tTu3TYU4kJm0E1ULMUpkXOncPqq wNtkH0oGFiaDPL9gU1el5LjREleIaxuA+VlOllyP1sTFhukFWlSaE3fs1Q2PZu36yXnOKYwhKhp oTmgrjznOPgJfovKOd23qKhEAym/WWhtNHDm8e2/JyV0YwfIrvjGl7NH5KGY9gWrlDnPDhtyy6w j+o2ya9x7KbiK6I1OMg== X-Proofpoint-ORIG-GUID: lsh0885dwUj3PbS77i-WLTkJzszaQvTP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-06_01,2026-07-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 bulkscore=0 adultscore=0 priorityscore=1501 suspectscore=0 spamscore=0 phishscore=0 lowpriorityscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607060112 On 30-06-2026 16:55, Konrad Dybcio wrote: > On 6/30/26 12:23 PM, Kuldeep Singh wrote: >>> qcom_ice_probe() >>> -> qcom_ice_create() >>> -> devm_clk_get_optional_enabled() >>> >>> If we remove the _enabled suffix and put a ice_resume() in ice_get(), >>> I believe this is no longer an issue >> >> I see your point. >> devm_clk_get_optional_enabled turns clocks on, whereas using >> devm_clk_get_optioanl will only get handle but don't enable clock. >> Please note, clocks are needed at probe to read ice hw version > > Right, but we don't need them afterwards in the probe function. We > can simply gate them. There's a parallel effort to enable runtime PM > in the driver: > > https://lore.kernel.org/linux-arm-msm/20260512033750.3393050-3-linlin.zhang@oss.qualcomm.com/ > > and with that all you'd need after getting the clock is a > pm_runtime_resume_and_get() before the version check, followed by a > pm_runtime_put() right after it I understand issue can be fixed in driver too. My argument/understanding was just why to even probe and check hw version in this case. > >> and then >> later ufs/sdhc fetch ice instance using of_qcom_ice_get() and control >> suspend/resume path. >> >> But my idea is, if storage itself isn't there(like sdhc on >> qcs6490-rb3gen2) then why sdhc-ice should even probe and check hardware >> version? as there's no significance in even probing ice. > > On the developer/customer experience side, would you expect having to > manually enable what's essentially a sub-feature of the storage media > on every single board? Umm ok, I feel it's pretty subjective as enable required featureset(and it's dependencies) only if user is explicitly enabling it. Controlling from driver/DT can anyway fix clock powered-on issue. -- Regards Kuldeep