From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753039AbdBMRaj (ORCPT ); Mon, 13 Feb 2017 12:30:39 -0500 Received: from exsmtp03.microchip.com ([198.175.253.49]:13144 "EHLO email.microchip.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752484AbdBMRaf (ORCPT ); Mon, 13 Feb 2017 12:30:35 -0500 Subject: Re: [PATCH RESEND 4/5] mtd: nand: atmel: Document the new DT bindings To: Boris Brezillon , Richard Weinberger , , Linus Walleij , Alexandre Courbot , , Vinod Koul , Dan Williams , , Alexandre Belloni , Wenyou Yang , Josh Wu , Haavard Skinnemoen , Hans-Christian Egtvedt , References: <1485535324-28393-1-git-send-email-boris.brezillon@free-electrons.com> <1485535324-28393-5-git-send-email-boris.brezillon@free-electrons.com> CC: David Woodhouse , Brian Norris , Marek Vasut , Cyrille Pitchen , , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , From: Nicolas Ferre Organization: atmel Message-ID: <494ca322-09c9-b782-8bb7-2eb3663779df@atmel.com> Date: Mon, 13 Feb 2017 18:31:02 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <1485535324-28393-5-git-send-email-boris.brezillon@free-electrons.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 8bit X-Brightmail-Tracker: =?Windows-1252?Q?H4sIAAAAAAAAC02Se0xTVxzHPffRe0E6LkXmsRqXVEkcUlazmB3ja9Nl?= =?Windows-1252?Q?3CzTsJAocSLWckeb0VtsK1SzxGZoIpAViHbMSloKYsfLNG0UUWDC8IEP?= =?Windows-1252?Q?JjgriLjxMggYJchcABPv5aLj/PU5v+/3d37fk/xoXDEhU9KczcqZeW2m?= =?Windows-1252?Q?ShZOhId/Q6g3PPemaGY7/u2i0YlQBYaujngJ1HavDkdPXv+JoxLnPYA8?= =?Windows-1252?Q?bR0kqnG+IVFx1UkcFZwfoFDhuJdEHaMDBPpvKpcQqAqgU7M+DAUGQyQK?= =?Windows-1252?Q?emYBun+5VIau/HSOQtcan+Co8mEnhopK6giUd6OdRCcbxgE63tRGoWeO?= =?Windows-1252?Q?3wnUO+0nPleyte5awJZNXyDY+46fMXYo0AnYBlcfxVb5XsnY4G9xbEXj?= =?Windows-1252?Q?M4wNVOfJ2MehRqF09ijb4z7IBsdGcLb81iTFTgZWJkXuIQ38AZNtP6nv?= =?Windows-1252?Q?/eUYltW32vaw5A5uB90r8kE4rWB8ANaNnKfyQRgdzeyEoR4PEIUlTB8B?= =?Windows-1252?Q?Wx6MAMl1BsDgzTeYeMEZPw67HtgJsUXGqOHdoiFZPqDpSCYa3nGmiWU5?= =?Windows-1252?Q?swkG+52YyAQTC0v/7gYixzAp0DNcjUmeKNh+emjumTAmGZ5qqpnz4IwG?= =?Windows-1252?Q?tpWXkhJ/BHMvnMFFVjCroeNFISWOgsy3sOn6l2IZMttg5V9+QuIt8I+S?= =?Windows-1252?Q?TkrirbCgsh6887yceT7Pa2H9aDMpcTy82FI437sZNv5ajEmcCP8Z8M3z?= =?Windows-1252?Q?Dujqt8979kB/8xhVBJSuBT9wLUjtWpC6DODVYLlOz6st2WrOptNrPk0w?= =?Windows-1252?Q?6vRZaqPWwCfoTMYAkJZv3SXQMLO7FSyjMVWMPDXgTVF8cMCUflivtejT?= =?Windows-1252?Q?zIcyOUsrWEHTKihPHhe0KDOXwdm+N2QKG/xOxuiwVgDpCNUSecWY4JFb?= =?Windows-1252?Q?srRGiyFD0m+BZcql8u9EgREF/SH+fW8XiFFGyyeeClpEFmc2GqxS/RH4?= =?Windows-1252?Q?kO7H6EFMQfAmnlMKURcJRwNGwVIaqKLl6WKWCANvfT9mVEiACQnIfXMJ?= =?Windows-1252?Q?rNr/JaUdGI4dndJNpX5t/IT8YoczNLydTyyIvJimLrfl5ET5ctdYnSFH?= =?Windows-1252?Q?6dMZt2maq82t+dF7vMU9lu0enri5dzDWkpFUtqi3eW/CbdsP5uWRKR/f?= =?Windows-1252?Q?Xf/Z/uLTcUfWxB+MaM9b7LHnrHWsCjWfezm58obrqyOJ8UnFGrjRsKp1?= =?Windows-1252?Q?V9eGR7b07Nv+qyrCoteui8PNFu1bDMjxsgQEAAA=3D?= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le 27/01/2017 à 17:42, Boris Brezillon a écrit : > Document the new DT bindings for the Atmel NAND controller and > deprecate the old ones. > > Signed-off-by: Boris Brezillon Ok with the binding: Reviewed-by: Nicolas Ferre > --- > .../devicetree/bindings/mtd/atmel-nand.txt | 106 ++++++++++++++++++++- > 1 file changed, 105 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > index 3e7ee99d3949..2a86ef2332dc 100644 > --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt > +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt > @@ -1,4 +1,108 @@ > -Atmel NAND flash > +Atmel NAND flash controller bindings > + > +The NAND flash controller node should be defined under the EBI bus (see > +Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt). > +One or several NAND devices can be defined under this NAND controller. > +The NAND controller might be connected to an ECC engine. > + > +* NAND controller bindings: > + > +Required properties: > +- compatible: should be one of the following > + "atmel,at91rm9200-nand-controller" > + "atmel,at91sam9261-nand-controller" > + "atmel,at91sam9g45-nand-controller" > + "atmel,sama5d3-nand-controller" > +- ranges: empty ranges property to forward EBI ranges definitions. > +- #address-cells: should be set to 2. > +- #size-cells: should be set to 1. > +- atmel,nfc-io: phandle to the NFC IO block. Only required for sama5d3 > + controllers. > +- atmel,nfc-sram: phandle to the NFC SRAM block. Only required for sama5d3 > + controllers. > + > +Optional properties: > +- ecc-engine: phandle to the PMECC block. Only meaningful if the SoC embeds > + a PMECC engine. > + > +* NAND device/chip bindings: > + > +Required properties: > +- reg: describes the CS lines assigned to the NAND device. If the NAND device > + exposes multiple CS lines (multi-dies chips), your reg property will > + contain X tuples of 3 entries. > + 1st entry: the CS line this NAND chip is connected to > + 2nd entry: the base offset of the memory region assigned to this > + device (always 0) > + 3rd entry: the memory region size (always 0x800000) > + > +Optional properties: > +- rb-gpios: the GPIO(s) used to check the Ready/Busy status of the NAND. > +- cs-gpios: the GPIO(s) used to control the CS line. > +- det-gpios: the GPIO used to detect if a Smartmedia Card is present. > +- atmel,rb: an integer identifying the native Ready/Busy pin. Only meaningful > + on sama5 SoCs. > + > +All generic properties described in > +Documentation/devicetree/bindings/mtd/{common,nand}.txt also apply to the NAND > +device node, and NAND partitions should be defined under the NAND node as > +described in Documentation/devicetree/bindings/mtd/partition.txt. > + > +* ECC engine (PMECC) bindings: > + > +Required properties: > +- compatible: should be one of the following > + "atmel,at91sam9g45-pmecc" > + "atmel,sama5d4-pmecc" > + "atmel,sama5d2-pmecc" > +- reg: should contain 2 register ranges. The first one is pointing to the PMECC > + block, and the second one to the PMECC_ERRLOC block. > + > +Example: > + > + pmecc: ecc-engine@ffffc070 { > + compatible = "atmel,at91sam9g45-pmecc"; > + reg = <0xffffc070 0x490>, > + <0xffffc500 0x100>; > + }; > + > + ebi: ebi@10000000 { > + compatible = "atmel,sama5d3-ebi"; > + #address-cells = <2>; > + #size-cells = <1>; > + atmel,smc = <&hsmc>; > + reg = <0x10000000 0x10000000 > + 0x40000000 0x30000000>; > + ranges = <0x0 0x0 0x10000000 0x10000000 > + 0x1 0x0 0x40000000 0x10000000 > + 0x2 0x0 0x50000000 0x10000000 > + 0x3 0x0 0x60000000 0x10000000>; > + clocks = <&mck>; > + > + nand_controller: nand-controller { > + compatible = "atmel,sama5d3-nand-controller"; > + atmel,nfc-sram = <&nfc_sram>; > + atmel,nfc-io = <&nfc_io>; > + ecc-engine = <&pmecc>; > + #address-cells = <2>; > + #size-cells = <1>; > + ranges; > + > + nand@3 { > + reg = <0x3 0x0 0x800000>; > + atmel,rb = <0>; > + > + /* > + * Put generic NAND/MTD properties and > + * subnodes here. > + */ > + }; > + }; > + }; > + > +----------------------------------------------------------------------- > + > +Deprecated bindings (should not be used in new device trees): > > Required properties: > - compatible: The possible values are: > -- Nicolas Ferre