From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21166C433FE for ; Wed, 16 Mar 2022 03:31:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240930AbiCPDdF (ORCPT ); Tue, 15 Mar 2022 23:33:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353467AbiCPDdE (ORCPT ); Tue, 15 Mar 2022 23:33:04 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89C473981F; Tue, 15 Mar 2022 20:31:46 -0700 (PDT) X-UUID: d9f223ae6a454a5c95471f904bd46f34-20220316 X-UUID: d9f223ae6a454a5c95471f904bd46f34-20220316 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 966662873; Wed, 16 Mar 2022 11:31:42 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 16 Mar 2022 11:31:41 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 16 Mar 2022 11:31:40 +0800 Message-ID: <4958a206e1fb1d7bf729c501c8548e9d83f7cff5.camel@mediatek.com> Subject: Re: [PATCH v13 2/6] soc: mediatek: mutex: add 8183 MUTEX MOD settings for MDP From: CK Hu To: Moudy Ho , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Hans Verkuil , "Jernej Skrabec" CC: Chun-Kuang Hu , Geert Uytterhoeven , Rob Landley , Laurent Pinchart , , , , , , "Alexandre Courbot" , , , , , AngeloGioacchino Del Regno , Maoguang Meng , daoyuan huang , Ping-Hsun Wu , , , , , , , , , Date: Wed, 16 Mar 2022 11:31:39 +0800 In-Reply-To: <20220315061031.21642-3-moudy.ho@mediatek.com> References: <20220315061031.21642-1-moudy.ho@mediatek.com> <20220315061031.21642-3-moudy.ho@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Moudy: On Tue, 2022-03-15 at 14:10 +0800, Moudy Ho wrote: > For the purpose of module independence, related settings should be > moved > from MDP to the corresponding driver. > This patch adds 8183 MUTEX MOD settings for MDP. > > Signed-off-by: Moudy Ho > --- > drivers/soc/mediatek/mtk-mutex.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/drivers/soc/mediatek/mtk-mutex.c > b/drivers/soc/mediatek/mtk-mutex.c > index 778b01ce9e8f..88fb4fc8f216 100644 > --- a/drivers/soc/mediatek/mtk-mutex.c > +++ b/drivers/soc/mediatek/mtk-mutex.c > @@ -80,6 +80,15 @@ > #define MT8183_MUTEX_MOD_DISP_GAMMA0 16 > #define MT8183_MUTEX_MOD_DISP_DITHER0 17 > > +#define MT8183_MUTEX_MOD_MDP_RDMA0 BIT(2) Display definition is a number, why MDP is bit definition? Regards, CK > +#define MT8183_MUTEX_MOD_MDP_RSZ0 BIT(4) > +#define MT8183_MUTEX_MOD_MDP_RSZ1 BIT(5) > +#define MT8183_MUTEX_MOD_MDP_TDSHP0 BIT(6) > +#define MT8183_MUTEX_MOD_MDP_WROT0 BIT(7) > +#define MT8183_MUTEX_MOD_MDP_WDMA BIT(8) > +#define MT8183_MUTEX_MOD_MDP_AAL0 BIT(23) > +#define MT8183_MUTEX_MOD_MDP_CCORR0 BIT(24) > + > #define MT8173_MUTEX_MOD_DISP_OVL0 11 > #define MT8173_MUTEX_MOD_DISP_OVL1 12 > #define MT8173_MUTEX_MOD_DISP_RDMA0 13 > @@ -244,6 +253,17 @@ static const unsigned int > mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = { > [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0, > }; > >