From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Melody Olvera <quic_molvera@quicinc.com>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] pinctrl: qcom: Add QDU1000/QRU1000 pinctrl driver
Date: Sat, 15 Oct 2022 09:40:39 -0400 [thread overview]
Message-ID: <498ea0a0-24c2-c9c0-3a5d-150ba32b3c4c@linaro.org> (raw)
In-Reply-To: <20221014221025.7372-3-quic_molvera@quicinc.com>
On 14/10/2022 18:10, Melody Olvera wrote:
> Add pin control driver for the TLMM block found in the QDU1000
> and QRU1000 SoC.
>
> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
> ---
> drivers/pinctrl/qcom/Kconfig | 9 +
> drivers/pinctrl/qcom/Makefile | 1 +
> drivers/pinctrl/qcom/pinctrl-qdu1000.c | 1274 ++++++++++++++++++++++++
> 3 files changed, 1284 insertions(+)
> create mode 100644 drivers/pinctrl/qcom/pinctrl-qdu1000.c
>
> diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
> index 9dc2d803a586..4ab857dc2847 100644
> --- a/drivers/pinctrl/qcom/Kconfig
> +++ b/drivers/pinctrl/qcom/Kconfig
> @@ -248,6 +248,15 @@ config PINCTRL_QCOM_SSBI_PMIC
> which are using SSBI for communication with SoC. Example PMIC's
> devices are pm8058 and pm8921.
>
> +config PINCTRL_QDU1000
> + tristate "Qualcomm Tehcnologies Inc QDU1000/QRU1000 pin controller driver"
> + depends on GPIOLIB && OF
depends on ARM64 || COMPILE_TEST
> + depends on PINCTRL_MSM
> + help
> + This is the pinctrl, pinmux, pinconf, and gpiolib driver for the
> + Qualcomm Technologies Inc TLMM block found on the Qualcomm
> + Technologies Inc QDU1000 and QRU1000 platforms.
> +
(...)
> + PINCTRL_PIN(138, "GPIO_138"),
> + PINCTRL_PIN(139, "GPIO_139"),
> + PINCTRL_PIN(140, "GPIO_140"),
> + PINCTRL_PIN(141, "GPIO_141"),
> + PINCTRL_PIN(142, "GPIO_142"),
> + PINCTRL_PIN(143, "GPIO_143"),
> + PINCTRL_PIN(144, "GPIO_144"),
> + PINCTRL_PIN(145, "GPIO_145"),
> + PINCTRL_PIN(146, "GPIO_146"),
> + PINCTRL_PIN(147, "GPIO_147"),
> + PINCTRL_PIN(148, "GPIO_148"),
> + PINCTRL_PIN(149, "GPIO_149"),
> + PINCTRL_PIN(150, "GPIO_150"),
Your bindings said you have GPIOs 0-149, not 0-150.
> + PINCTRL_PIN(151, "SDC1_RCLK"),
> + PINCTRL_PIN(152, "SDC1_CLK"),
> + PINCTRL_PIN(153, "SDC1_CMD"),
> + PINCTRL_PIN(154, "SDC1_DATA"),
This also does not match bindings.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-10-15 13:40 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-14 22:10 [PATCH v2 0/2] Add pinctrl support for QDU1000/QRU1000 SoCs Melody Olvera
2022-10-14 22:10 ` [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add QDU1000 and QRU1000 pinctrl bindings Melody Olvera
2022-10-15 13:38 ` Krzysztof Kozlowski
2022-10-19 18:22 ` Melody Olvera
2022-10-16 22:58 ` Rob Herring
2022-10-14 22:10 ` [PATCH v2 2/2] pinctrl: qcom: Add QDU1000/QRU1000 pinctrl driver Melody Olvera
2022-10-15 13:40 ` Krzysztof Kozlowski [this message]
2022-10-25 21:03 ` Melody Olvera
2022-10-14 23:54 ` [PATCH v2 0/2] Add pinctrl support for QDU1000/QRU1000 SoCs Melody Olvera
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