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[109.252.193.52]) by smtp.googlemail.com with ESMTPSA id e18sm3324938ljl.92.2021.03.16.15.56.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 16 Mar 2021 15:56:39 -0700 (PDT) Subject: Re: [PATCH v15 1/2] drm/tegra: dc: Support memory bandwidth management From: Dmitry Osipenko To: =?UTF-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= Cc: Thierry Reding , Jonathan Hunter , Matt Merhar , Peter Geis , Nicolas Chauvet , linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org References: <20210311172255.25213-1-digetx@gmail.com> <20210311172255.25213-2-digetx@gmail.com> <20210314223119.GC2733@qmqm.qmqm.pl> <1158bbca-8880-918d-7564-e2e30552e6b3@gmail.com> Message-ID: <49a69c69-44e7-741f-b86b-ef4fe83c76b1@gmail.com> Date: Wed, 17 Mar 2021 01:56:38 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <1158bbca-8880-918d-7564-e2e30552e6b3@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 15.03.2021 21:39, Dmitry Osipenko пишет: >>> + /* >>> + * Horizontal downscale needs a lower memory latency, which roughly >>> + * depends on the scaled width. Trying to tune latency of a memory >>> + * client alone will likely result in a strong negative impact on >>> + * other memory clients, hence we will request a higher bandwidth >>> + * since latency depends on bandwidth. This allows to prevent memory >>> + * FIFO underflows for a large plane downscales, meanwhile allowing >>> + * display to share bandwidth fairly with other memory clients. >>> + */ >>> + if (src_w > dst_w) >>> + mul = (src_w - dst_w) * bpp / 2048 + 1; >>> + else >>> + mul = 1; >> [...] >> >> One point is unexplained yet: why is the multiplier proportional to a >> *difference* between src and dst widths? Also, I would expect max (worst >> case) is pixclock * read_size when src_w/dst_w >= read_size. > IIRC, the difference gives a more adequate/practical result than the > proportion. Although, downstream driver uses proportion. I'll try to > revisit this for the next version of the patch. I tried to re-test everything and can't reproduce problems that existed previously. We didn't have a finished memory drivers back then and I think that Tegra30 latency tuning support and various Tegra20 changes fixed those problems. I'll remove this hunk in the next version.