Re: [PATCH] nvmem: core: Mark nWP GPIO as non-exclusive

[Marek Vasut <marex@nabladev.com>]

On 5/12/26 12:04 PM, Bartosz Golaszewski wrote:
> On Mon, May 11, 2026 at 6:35 PM Marek Vasut <marex@nabladev.com> wrote:
>>
>> Mark the nWP GPIO as non-exclusive, because there is hardware in the
>> field which has multiple AT24 EEPROMs with nWP GPIO line tied to a
>> single GPIO. This allows such hardware to be described in DT and the
>> nWP GPIO operated via NVMEM force_ro sysfs attribute.
>>
>> Note that GPIOD_FLAGS_BIT_NONEXCLUSIVE is a deprecated flag and should
>> not be used, but thus far there seems to be no replacement.
>>
> 
> There is a replacement now. It lives under
> drivers/gpio/gpiolib-shared.c and drivers/gpio/gpio-shared-proxy.c.
> Though the voting mechanism I implemented is hard-coded to drive the
> line high if there's at least one consumer sharing the line that votes
> high. I'm now thinking that this may be too rigid as yesterday, within
> two hours I had two submissions wanting to do it the other way around
> - drive the line low if there's at least one consumer that wants it
> low.
> 
> I'll try to modify the gpio-shared-proxy driver to take into account
> the value set when the line is first requested and treat it as the
> "default" in the voting mechanism. IOW: when the first user requests
> it out-high, we'll drive it low on the first user that votes for low
> and drive it high again when the last user drivers it high. This
> should work for both the Qualcomm shared GPIOs for audio use-cases and
> the WP pin here as well as the SCL recovery shared GPIO we have in
> I2C.
Shouldn't the polarity inversion be handled by DT GPIO_ACTIVE_* flags 
instead ?