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Fri, 18 Jul 2025 09:05:58 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 56I95vF1018192 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 18 Jul 2025 09:05:57 GMT Received: from [10.253.76.178] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Fri, 18 Jul 2025 02:05:51 -0700 Message-ID: <49d5d360-6a2f-4dd4-bbd7-1a902e556f00@quicinc.com> Date: Fri, 18 Jul 2025 17:05:49 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 07/10] dt-bindings: clock: qcom: Add NSS clock controller for IPQ5424 SoC To: Konrad Dybcio , Rob Herring CC: Georgi Djakov , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Michael Turquette , "Stephen Boyd" , Anusha Rao , Konrad Dybcio , Philipp Zabel , "Richard Cochran" , Catalin Marinas , Will Deacon , , , , , , , , , , , , References: <20250710-qcom_ipq5424_nsscc-v3-0-f149dc461212@quicinc.com> <20250710-qcom_ipq5424_nsscc-v3-7-f149dc461212@quicinc.com> <20250710225539.GA29510-robh@kernel.org> <0ef83a1e-38c3-41bb-8fd2-c28565f2a0ba@oss.qualcomm.com> Content-Language: en-US From: Luo Jie In-Reply-To: <0ef83a1e-38c3-41bb-8fd2-c28565f2a0ba@oss.qualcomm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: AZYG4c9OW3-sedX7DX_sxsCBKToCgLEp X-Proofpoint-ORIG-GUID: AZYG4c9OW3-sedX7DX_sxsCBKToCgLEp X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzE4MDA3MSBTYWx0ZWRfX5LbihV0UUb0t o21O7oJbdD4zibgNivY2bBbTBmsoB+iplPPmx6rChx/ut7gn7Oak9Xo/Cba0tVImzdtQkjf1JHs oBhPicQoATtb1Fewi02B34i2fBfDyxh3jYR9b0phAg+OD5StpMgfsgLmQYmCOShN9QFNsCKMzOn 26tvTc4F9OyOLprj0x3bKaZAaGpQlEg1fhfuj99i0Q8gwfUgzDY6traYYcPkyKmuIIXwsK17vIe TJCR//Ud9056pCQTdr4hFGqOk1FzaAQpT5pfn+wgYcVmWY2xUQ+wpP1ORBNOzNz25K2QkDbzspP 8DK+tiwNRq5rISN3CmyTieuEroCtcDkvB990oXHNm3lmCjGtGTPDHYuRECylvgScCL67CvfA0CJ m+MV1TXB/J3gdyyDPiGbtHPDnjLNTBAeVONL7gP9/lZJabYnuwN1kjL+WO0vQiEzYhGtlMJj X-Authority-Analysis: v=2.4 cv=Xc2JzJ55 c=1 sm=1 tr=0 ts=687a0e76 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=COk6AnOGAAAA:8 a=zwoUeVU6iwdCpd6WVVcA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-18_02,2025-07-17_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxscore=0 priorityscore=1501 adultscore=0 mlxlogscore=999 phishscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 clxscore=1015 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507180071 On 7/11/2025 8:16 PM, Konrad Dybcio wrote: > On 7/11/25 12:55 AM, Rob Herring wrote: >> On Thu, Jul 10, 2025 at 08:28:15PM +0800, Luo Jie wrote: >>> NSS clock controller provides the clocks and resets to the networking >>> blocks such as PPE (Packet Process Engine) and UNIPHY (PCS) on IPQ5424 >>> devices. >>> >>> Add the compatible "qcom,ipq5424-nsscc" support based on the current >>> IPQ9574 NSS clock controller DT binding file. ICC clocks are always >>> provided by the NSS clock controller of IPQ9574 and IPQ5424, so add >>> interconnect-cells as required DT property. >>> >>> Also add master/slave ids for IPQ5424 networking interfaces, which is >>> used by nss-ipq5424 driver for providing interconnect services using >>> icc-clk framework. >>> >>> Signed-off-by: Luo Jie >>> --- > > [...] > >>> clocks: >>> items: >>> @@ -57,6 +61,7 @@ required: >>> - compatible >>> - clocks >>> - clock-names >>> + - '#interconnect-cells' >> >> You just made this required for everyone. Again, that's an ABI change. > > In this case it's actually valid, but should be a separate fixup change > > Konrad Making #interconnect-cells a required property does introduce an ABI change in the device tree bindings. However, this change is necessary to ensure proper functionality and integration with the interconnect framework, which increasingly relies on this property for accurate configuration and resource management. Yes, this is a fixup change. Since the current NSS clock controller DTS node for IPQ9574 already includes '#interconnect-cells', I will separate this modification into a standalone fixup patch.