From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753526AbZHEWex (ORCPT ); Wed, 5 Aug 2009 18:34:53 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753405AbZHEWev (ORCPT ); Wed, 5 Aug 2009 18:34:51 -0400 Received: from mail.mnementh.co.uk ([173.45.232.4]:32985 "EHLO mnementh.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753416AbZHEWet (ORCPT ); Wed, 5 Aug 2009 18:34:49 -0400 Message-ID: <4A7A08FE.5000909@mnementh.co.uk> Date: Wed, 05 Aug 2009 23:34:38 +0100 From: Ian Molton User-Agent: Mozilla-Thunderbird 2.0.0.19 (X11/20090103) MIME-Version: 1.0 To: Guennadi Liakhovetski CC: Magnus Damm , pHilipp Zabel , Paul Mundt , Mark Brown , linux-kernel@vger.kernel.org, Pierre Ossman , Magnus Damm Subject: Re: MMC: Make the configuration memory resource optional References: <4A7053E8.8050303@mnementh.co.uk> <20090729201702.GA28202@linux-sh.org> <74d0deb30907291355n39df7db0v1d7afc93917adc14@mail.gmail.com> <4A716F1C.2050805@mnementh.co.uk> <4A71F2A5.4060206@mnementh.co.uk> <4A787C2C.5070000@mnementh.co.uk> <4A798A4B.4000901@mnementh.co.uk> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Guennadi Liakhovetski wrote: > How do we verify this? Do I need some "very fast" card, so that sd would > try to drive the clock beyond pdata->hclk / 2, which should then fail? One way would be a 'scope on the card pins, but since you havent said I am assuming you have not altered the clock-speed setting routine. Here you can see why I didnt like the silently-drop-conf-accesses version of the patch. If you had not made conf area accesses silently succeed, you'd have found one lurking in the set_clock function. Since your controller has no CNF area, it was discarding the write to the 1:1 clock bit (that isnt in its none-existant conf area) and thus you got the next lowest clock as a result (/2) > Currently I'm using 24MHz (copied from the original driver), and the only > thing I know about the controller is its "Maximum operating frequency: 25 > MHz." Thats the HCLK frequency, not the card clock. the TMIO MFD devices can divide this HCLK by anything from 512 to 2, and MFD devices have a facility to disable the divider, yielding full HCLK speed as the card clock. If you havent already found a 1:1 clock enable bit on your device, you might try looking for it - it'd yield a near linear factor-of-two speed increase. -Ian