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From: "Jan Beulich" <JBeulich@novell.com>
To: "Yinghai Lu" <yinghai@kernel.org>
Cc: <mingo@elte.hu>, <tglx@linutronix.de>,
	<linux-kernel@vger.kernel.org>, <hpa@zytor.com>
Subject: Re: [PATCH] x86-64: fix and clean up AMD Fam10 MMCONF enabling
Date: Mon, 08 Nov 2010 08:00:32 +0000	[thread overview]
Message-ID: <4CD7BC300200007800020E08@vpn.id2.novell.com> (raw)
In-Reply-To: <4CD454D1.2060503@kernel.org>

>>> On 05.11.10 at 20:02, Yinghai Lu <yinghai@kernel.org> wrote:
> On 11/04/2010 08:22 AM, Jan Beulich wrote:
>> @@ -123,9 +123,9 @@ static void __cpuinit get_fam10h_pci_mmc
>>  		if (!(reg & 3))
>>  			continue;
>>  
>> -		start = (((u64)reg) << 8) & (0xffULL << 32); /* 39:16 on 31:8*/
>> +		start = (u64)(reg & 0xffffff00) << 8; /* 39:16 on 31:8*/
>>  		reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3));
>> -		end = (((u64)reg) << 8) & (0xffULL << 32); /* 39:16 on 31:8*/
>> +		end = ((u64)(reg & 0xffffff00) << 8) | 0xffff; /* 39:16 on 31:8*/
>>  
>>  		if (!end)
>>  			continue;
> 
> those section could be changed to:
> 
>                 start = reg & 0xffffff00; /* 39:16 on 31:8*/
>                 start <<= 8;
>                 reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3));
>                 end = (reg & 0xffffff00);
>                 end <<= 8;
> 
>                 if (!end)
>                         continue;
>                 end |= 0xffff;
> 
>                 hi_mmio_num = add_range(range, 8, hi_mmio_num, start, end + 1);
> 
> 1. append 0xffff after !end checking..

Yes, this one I missed, but it gets fixed by the follow-up patch
anyway (if I'm to re-submit, I'll fold in that second patch anyway).

> 2. add_range should take end + 1;

That's only after your change making use of this function.

>> @@ -206,8 +200,10 @@ void __cpuinit fam10h_check_enable_mmcfg
>>  	 * with 256 buses
>>  	 */
>>  	get_fam10h_pci_mmconf_base();
>> -	if (fam10h_pci_mmconf_base_status <= 0)
>> +	if (!fam10h_pci_mmconf_base) {
>> +		pci_probe &= ~PCI_CHECK_ENABLE_AMD_MMCONF;
>>  		return;
>> +	}
>>  
>>  	printk(KERN_INFO "Enable MMCONFIG on AMD Family 10h\n");
>>  	val &= ~((FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT) |
>> 
>> 
> 
> looks like fam10h_pci_mmconf_base_status should NOT be removed.
> 
> -1: mean we can not find right new base on BSP, so should not let AP to mess 
> it again.

Note that is now achieved by clearing PCI_CHECK_ENABLE_AMD_MMCONF
from pci_probe (imo a better way, as it inhibits code elsewhere which
is protected by checks of this bit).

Jan


  reply	other threads:[~2010-11-08  8:00 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-11-04 15:22 Jan Beulich
2010-11-05 17:56 ` Yinghai Lu
2010-11-05 19:02 ` Yinghai Lu
2010-11-08  8:00   ` Jan Beulich [this message]
2010-11-08 19:20     ` Yinghai Lu

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