From: "Jan Beulich" <JBeulich@novell.com>
To: "Ingo Molnar" <mingo@elte.hu>, "Yinghai Lu" <yinghai@kernel.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>
Cc: "Andrew Morton" <akpm@linux-foundation.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH -v2 2/2] x86/pci: Add mmconf range into e820 for when it is from MSR with amd faml0h
Date: Thu, 11 Nov 2010 08:50:54 +0000 [thread overview]
Message-ID: <4CDBBC7E0200007800021A2D@vpn.id2.novell.com> (raw)
In-Reply-To: <4CDB3EBB.4010800@kernel.org>
>>> On 11.11.10 at 01:54, Yinghai Lu <yinghai@kernel.org> wrote:
> @@ -191,10 +208,12 @@ void __cpuinit fam10h_check_enable_mmcfg
> /* only trust the one handle 256 buses, if acpi=off */
> if (!acpi_pci_disabled || busnbits >= 8) {
> u64 base;
> - base = val & (0xffffULL << 32);
> + base = val & (FAM10H_MMIO_CONF_BASE_MASK <<
> + FAM10H_MMIO_CONF_BASE_SHIFT);
> if (fam10h_pci_mmconf_base_status <= 0) {
> fam10h_pci_mmconf_base = base;
> fam10h_pci_mmconf_base_status = 1;
> + e820_add_mmconf_range(busnbits);
> return;
> } else if (fam10h_pci_mmconf_base == base)
> return;
I don't think adding the range in this case is correct: Here, we
found that the BIOS enabled the feature, and we're doing
nothing to "correct" it, so we also should expect the range
to be reserved by the BIOS.
Jan
next prev parent reply other threads:[~2010-11-11 8:50 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-11-11 0:53 [PATCH 1/2] x86: Change sanitize_e820_map() definition Yinghai Lu
2010-11-11 0:54 ` [PATCH -v2 2/2] x86/pci: Add mmconf range into e820 for when it is from MSR with amd faml0h Yinghai Lu
2010-11-11 8:50 ` Jan Beulich [this message]
2010-11-11 18:54 ` Yinghai Lu
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