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From: Frank Rowand <frank.rowand@am.sony.com>
To: "Rowand, Frank" <Frank_Rowand@sonyusa.com>
Cc: "tglx@linutronix.de" <tglx@linutronix.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"peterz@infradead.org" <peterz@infradead.org>,
	"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
	"rostedt@goodmis.org" <rostedt@goodmis.org>
Subject: Re: [PATCH] PREEMPT_RT_FULL: ARM context switch needs IRQs enabled
Date: Fri, 16 Dec 2011 12:56:29 -0800	[thread overview]
Message-ID: <4EEBB07D.2070905@am.sony.com> (raw)
In-Reply-To: <4EEAB90D.3050504@am.sony.com>

On 12/15/11 19:20, Frank Rowand wrote:
> 
> ARMv6 and later have VIPT caches and the TLBs are tagged with an ASID
> (application specific ID). The number of ASIDs is limited to 256 and
> the allocation algorithm requires IPIs when all the ASIDs have been
> used.  The IPIs require interrupts enabled during context switch for
> deadlock avoidance.
> 
> The RT patch mm-protect-activate-switch-mm.patch disables irqs around
> activate_mm() and switch_mm(), which are the portion of the ARMv6
> context switch that require interrupts enabled.
> 
> The solution for the ARMv6 processors could be to _not_ disable irqs.
> A more conservative solution is to provide the same environment that
> the scheduler provides, that is preempt_disable().  This is more
> resilient for possible future changes to the ARM context switch code
> that is not aware of the RT patches.
> 
> This patch will conflict slightly with Catalin's patch set to remove
> __ARCH_WANT_INTERRUPTS_ON_CTXSW, when that is accepted:
> 
>    http://lkml.indiana.edu/hypermail/linux/kernel/1111.3/01893.html
> 
> When Catalin's patch set is accepted, this RT patch will need to reverse
> the change in patch 6 to arch/arm/include/asm/system.h:
> 
>    -#ifndef CONFIG_CPU_HAS_ASID
>    -#define __ARCH_WANT_INTERRUPTS_ON_CTXSW
>    -#endif
> 
> Signed-off-by: Frank Rowand <frank.rowand@am.sony.com>
> 
> ---
>  fs/exec.c        |    8 	8 +	0 -	0 !
>  mm/mmu_context.c |    8 	8 +	0 -	0 !
>  2 files changed, 16 insertions(+)
> 
> Index: b/fs/exec.c
> ===================================================================
> --- a/fs/exec.c
> +++ b/fs/exec.c
> @@ -837,12 +837,20 @@ static int exec_mmap(struct mm_struct *m
>  		}
>  	}
>  	task_lock(tsk);
> +#ifdef __ARCH_WANT_INTERRUPTS_ON_CTXSW

Self critique...  I really, really dislike this ifdef because it will
fail silently if the includes are changed and as a result the include file that
defines __ARCH_WANT_INTERRUPTS_ON_CTXSW (arch/arm/include/asm/system.h) is not
included.

Does anyone have any brilliant ideas for an alternative approach?

-Frank


  parent reply	other threads:[~2011-12-16 20:57 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-12-16  3:20 Frank Rowand
2011-12-16  9:54 ` Peter Zijlstra
2011-12-16 11:13   ` Catalin Marinas
2011-12-16 11:43     ` Catalin Marinas
2011-12-16 12:49       ` Peter Zijlstra
2011-12-16 15:23         ` Catalin Marinas
2011-12-16 21:43   ` Steven Rostedt
2011-12-16 11:01 ` Catalin Marinas
2011-12-16 23:23   ` Frank Rowand
2011-12-19 10:02     ` Catalin Marinas
2011-12-20  1:49       ` Frank Rowand
2011-12-20 12:25         ` Catalin Marinas
     [not found]         ` <CAHkRjk5AbCGzPtb5qeWL4CpK=KrBzL_QgD55tzS36dGRjn-rQA@mail.gmail.com>
2011-12-20 20:09           ` Frank Rowand
2011-12-16 20:56 ` Frank Rowand [this message]
2011-12-16 21:36   ` Catalin Marinas

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