From: Paolo Bonzini <pbonzini@redhat.com>
To: "Lendacky, Thomas" <Thomas.Lendacky@amd.com>,
Josh Poimboeuf <jpoimboe@redhat.com>,
"x86@kernel.org" <x86@kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Thomas Gleixner <tglx@linutronix.de>, Pu Wen <puwen@hygon.cn>,
Borislav Petkov <bp@alien8.de>
Subject: Re: [RFC PATCH] x86: Remove X86_FEATURE_MFENCE_RDTSC
Date: Wed, 10 Jul 2019 08:20:40 +0200 [thread overview]
Message-ID: <4a13c6a3-a13e-d3e5-0008-41a6d47a6eff@redhat.com> (raw)
In-Reply-To: <45f247d2-80f5-6c8c-d11e-965a3da8a88f@amd.com>
On 08/07/19 21:32, Lendacky, Thomas wrote:
>> AMD and Intel both have serializing lfence (X86_FEATURE_LFENCE_RDTSC).
>> They've both had it for a long time, and AMD has had it enabled in Linux
>> since Spectre v1 was announced.
>>
>> Back then, there was a proposal to remove the serializing mfence feature
>> bit (X86_FEATURE_MFENCE_RDTSC), since both AMD and Intel have
>> serializing lfence. At the time, it was (ahem) speculated that some
>> hypervisors might not yet support its removal, so it remained for the
>> time being.
>>
>> Now a year-and-a-half later, it should be safe to remove.
>
> I vaguely remember a concern from a migration point of view, maybe? Adding
> Paolo to see if he has any concerns.
It would be a problem to remove the conditional "if
(boot_cpu_has(X86_FEATURE_LFENCE_RDTSC))" from svm_get_msr_feature. But
removing support for X86_FEATURE_MFENCE_RDTSC essentially amounts to
removing support for hypervisors that haven't been updated pre-Spectre.
That's fair enough, I think.
Paolo
next prev parent reply other threads:[~2019-07-10 6:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-04 15:46 Josh Poimboeuf
2019-07-08 19:32 ` Lendacky, Thomas
2019-07-10 6:20 ` Paolo Bonzini [this message]
2019-07-10 11:33 ` Thomas Gleixner
2019-07-11 17:45 ` Josh Poimboeuf
2019-07-22 10:04 ` [tip:x86/cpu] " tip-bot for Josh Poimboeuf
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