Re: [PATCH 1/2] dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm SM8650 SoC

[Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>]

On 25/10/2023 09:33, Neil Armstrong wrote:
> Document the RPMh Network-On-Chip Interconnect of the SM8650 platform.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  .../bindings/interconnect/qcom,sm8650-rpmh.yaml    | 136 ++++++++++++++++++
>  .../dt-bindings/interconnect/qcom,sm8650-rpmh.h    | 154 +++++++++++++++++++++
>  2 files changed, 290 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sm8650-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sm8650-rpmh.yaml
> new file mode 100644
> index 000000000000..65b239ac2afd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,sm8650-rpmh.yaml
> @@ -0,0 +1,136 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
> +
> +maintainers:
> +  - Abel Vesa <abel.vesa@linaro.org>
> +  - Neil Armstrong <neil.armstrong@linaro.org>
> +
> +description: |
> +  RPMh interconnect providers support system bandwidth requirements through
> +  RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
> +  able to communicate with the BCM through the Resource State Coordinator (RSC)
> +  associated with each execution environment. Provider nodes must point to at
> +  least one RPMh device child node pertaining to their RSC and each provider
> +  can map to multiple RPMh resources.
> +
> +  See also:: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h
> +
> +properties:
> +  compatible:
> +    enum:
> +      - qcom,sm8650-aggre1-noc
> +      - qcom,sm8650-aggre2-noc
> +      - qcom,sm8650-clk-virt
> +      - qcom,sm8650-cnoc-main
> +      - qcom,sm8650-config-noc
> +      - qcom,sm8650-gem-noc
> +      - qcom,sm8650-lpass-ag-noc
> +      - qcom,sm8650-lpass-lpiaon-noc
> +      - qcom,sm8650-lpass-lpicx-noc
> +      - qcom,sm8650-mc-virt
> +      - qcom,sm8650-mmss-noc
> +      - qcom,sm8650-nsp-noc
> +      - qcom,sm8650-pcie-anoc
> +      - qcom,sm8650-system-noc
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    minItems: 1
> +    maxItems: 2

If there is going to be resend/new version:

Please put required: block here.

In any case:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof