From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754456AbdJSQCt (ORCPT ); Thu, 19 Oct 2017 12:02:49 -0400 Received: from mx1.riseup.net ([198.252.153.129]:56615 "EHLO mx1.riseup.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752852AbdJSQCr (ORCPT ); Thu, 19 Oct 2017 12:02:47 -0400 X-Riseup-User-ID: AB321A157028CB3E79A77C0953C415B00D4163A40FFE43EE060FC0DE565A8FAF X-Riseup-User-ID: E0049F41D7BC75E29308161CBDAC5C486A3A258EF8E2855864E7C8FD71689427 X-Riseup-User-ID: BEDFC4241EA3E22A07C3E2B575B18DBB91DC347F66451FCBE5B41EB955FAEDAA X-Riseup-User-ID: 3A65021B3DE639774C8FA580BE9FF3155A8538026D8B676B91E56441F8FFDB80 X-Riseup-User-ID: 0F202D730C4B06E5FF1A7291FC188485E6D44B98616221C393C4342A7225A9F0 X-Riseup-User-ID: BD78BD3632BBE87C3750C40A2770B8DD4467BD91E962E8572D8E2696AEDE2486 X-Riseup-User-ID: 7659C1EE5D44FD399CAEE1E4B879D74EEEDBE952ACA4E714F638F0075D93B072 X-Riseup-User-ID: CF1B847336D8A1C380F92C3E749EEF2EF6867A78114EFFF80F9C0A99596DE16A Subject: Re: [linux-sunxi] [PATCH v2 6/8] ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file To: Chen-Yu Tsai Cc: Lee Jones , Maxime Ripard , linux-arm-kernel , devicetree , linux-kernel , linux-sunxi , Quentin Schulz References: <20171018083138.14517-1-wens@csie.org> <20171018083138.14517-7-wens@csie.org> From: =?UTF-8?Q?Joonas_Kylm=c3=a4l=c3=a4?= Message-ID: <4a2734fb-71ab-7cd9-2b17-669f2fdf9a2c@riseup.net> Date: Thu, 19 Oct 2017 16:02:00 +0000 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Chen-Yu Tsai: >> Chen-Yu Tsai: >>> mmc1 only has 1 possible pinmux setting. >> >> What if someone is using the MMC with bus width 1 and then using the >> remaining 3 pins for something else? > > I would very much like to see such a design. Currently the devices > we see all follow Allwinner's reference design, with only minor > modifications. As such, mmc1 is used exclusively for connecting > SDIO-based WiFi modules. > > If such a radical(?) design is done, the vendor can always add > a "mmc1-1bit-pins" setting and override the default. Alright. So could we then make similar patches for other SoCs that have the same situation with the MMC pinmuxing? I.e. let's move the pinctrl to the dtsi file from the dts files. With H3 SDC0 and SDC1 nodes could be moved then to the dtsi. Can't we also move the SDC0 pinctrl in A83T to the dtsi file? Though, in order to do that mmc0_cd_pin node needs to be added to the A38T dtsi. Joonas